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@@ -121,7 +121,7 @@
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32.768 KHz Clock */
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/* SPI DMA Register Bit Fields & Masks */
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-#define SPI_DMA_RHDMA (0xF << 4) /* RXFIFO Half Status */
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+#define SPI_DMA_RHDMA (0x1 << 4) /* RXFIFO Half Status */
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#define SPI_DMA_RFDMA (0x1 << 5) /* RXFIFO Full Status */
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#define SPI_DMA_TEDMA (0x1 << 6) /* TXFIFO Empty Status */
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#define SPI_DMA_THDMA (0x1 << 7) /* TXFIFO Half Status */
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@@ -1355,6 +1355,7 @@ static int setup(struct spi_device *spi)
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spi->bits_per_word,
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spi_speed_hz(SPI_CONTROL_DATARATE_MIN),
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spi->max_speed_hz);
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+ return status;
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err_first_setup:
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kfree(chip);
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