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@@ -511,6 +511,15 @@ struct ath_gen_timer_table {
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* @setup_calibration: set up calibration
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* @setup_calibration: set up calibration
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* @iscal_supported: used to query if a type of calibration is supported
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* @iscal_supported: used to query if a type of calibration is supported
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* @loadnf: load noise floor read from each chain on the CCA registers
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* @loadnf: load noise floor read from each chain on the CCA registers
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+ *
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+ * @ani_reset: reset ANI parameters to default values
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+ * @ani_lower_immunity: lower the noise immunity level. The level controls
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+ * the power-based packet detection on hardware. If a power jump is
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+ * detected the adapter takes it as an indication that a packet has
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+ * arrived. The level ranges from 0-5. Each level corresponds to a
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+ * few dB more of noise immunity. If you have a strong time-varying
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+ * interference that is causing false detections (OFDM timing errors or
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+ * CCK timing errors) the level can be increased.
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*/
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*/
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struct ath_hw_private_ops {
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struct ath_hw_private_ops {
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/* Calibration ops */
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/* Calibration ops */
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@@ -554,6 +563,10 @@ struct ath_hw_private_ops {
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int param);
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int param);
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void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
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void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
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void (*loadnf)(struct ath_hw *ah, struct ath9k_channel *chan);
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void (*loadnf)(struct ath_hw *ah, struct ath9k_channel *chan);
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+
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+ /* ANI */
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+ void (*ani_reset)(struct ath_hw *ah);
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+ void (*ani_lower_immunity)(struct ath_hw *ah);
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};
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};
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/**
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/**
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@@ -564,6 +577,11 @@ struct ath_hw_private_ops {
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*
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*
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* @config_pci_powersave:
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* @config_pci_powersave:
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* @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
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* @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
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+ *
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+ * @ani_proc_mib_event: process MIB events, this would happen upon specific ANI
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+ * thresholds being reached or having overflowed.
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+ * @ani_monitor: called periodically by the core driver to collect
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+ * MIB stats and adjust ANI if specific thresholds have been reached.
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*/
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*/
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struct ath_hw_ops {
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struct ath_hw_ops {
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void (*config_pci_powersave)(struct ath_hw *ah,
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void (*config_pci_powersave)(struct ath_hw *ah,
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@@ -604,6 +622,9 @@ struct ath_hw_ops {
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u32 burstDuration);
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u32 burstDuration);
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void (*set11n_virtualmorefrag)(struct ath_hw *ah, void *ds,
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void (*set11n_virtualmorefrag)(struct ath_hw *ah, void *ds,
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u32 vmf);
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u32 vmf);
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+
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+ void (*ani_proc_mib_event)(struct ath_hw *ah);
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+ void (*ani_monitor)(struct ath_hw *ah, struct ath9k_channel *chan);
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};
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};
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struct ath_hw {
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struct ath_hw {
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@@ -934,6 +955,14 @@ void ar9003_hw_attach_calib_ops(struct ath_hw *ah);
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void ar9002_hw_attach_ops(struct ath_hw *ah);
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void ar9002_hw_attach_ops(struct ath_hw *ah);
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void ar9003_hw_attach_ops(struct ath_hw *ah);
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void ar9003_hw_attach_ops(struct ath_hw *ah);
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+/*
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+ * ANI work can be shared between all families but a next
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+ * generation implementation of ANI will be used only for AR9003 only
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+ * for now as the other families still need to be tested with the same
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+ * next generation ANI.
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+ */
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+void ath9k_hw_attach_ani_ops_old(struct ath_hw *ah);
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+
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#define ATH_PCIE_CAP_LINK_CTRL 0x70
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#define ATH_PCIE_CAP_LINK_CTRL 0x70
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#define ATH_PCIE_CAP_LINK_L0S 1
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#define ATH_PCIE_CAP_LINK_L0S 1
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#define ATH_PCIE_CAP_LINK_L1 2
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#define ATH_PCIE_CAP_LINK_L1 2
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