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@@ -117,44 +117,59 @@ struct rio_atmu_regs {
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};
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};
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struct rio_msg_regs {
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struct rio_msg_regs {
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- u32 omr;
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- u32 osr;
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+ u32 omr; /* 0xD_3000 - Outbound message 0 mode register */
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+ u32 osr; /* 0xD_3004 - Outbound message 0 status register */
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u32 pad1;
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u32 pad1;
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- u32 odqdpar;
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+ u32 odqdpar; /* 0xD_300C - Outbound message 0 descriptor queue
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+ dequeue pointer address register */
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u32 pad2;
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u32 pad2;
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- u32 osar;
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- u32 odpr;
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- u32 odatr;
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- u32 odcr;
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+ u32 osar; /* 0xD_3014 - Outbound message 0 source address
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+ register */
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+ u32 odpr; /* 0xD_3018 - Outbound message 0 destination port
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+ register */
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+ u32 odatr; /* 0xD_301C - Outbound message 0 destination attributes
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+ Register*/
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+ u32 odcr; /* 0xD_3020 - Outbound message 0 double-word count
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+ register */
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u32 pad3;
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u32 pad3;
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- u32 odqepar;
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+ u32 odqepar; /* 0xD_3028 - Outbound message 0 descriptor queue
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+ enqueue pointer address register */
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u32 pad4[13];
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u32 pad4[13];
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- u32 imr;
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- u32 isr;
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+ u32 imr; /* 0xD_3060 - Inbound message 0 mode register */
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+ u32 isr; /* 0xD_3064 - Inbound message 0 status register */
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u32 pad5;
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u32 pad5;
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- u32 ifqdpar;
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+ u32 ifqdpar; /* 0xD_306C - Inbound message 0 frame queue dequeue
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+ pointer address register*/
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u32 pad6;
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u32 pad6;
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- u32 ifqepar;
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+ u32 ifqepar; /* 0xD_3074 - Inbound message 0 frame queue enqueue
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+ pointer address register */
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u32 pad7[226];
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u32 pad7[226];
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- u32 odmr;
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- u32 odsr;
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+ u32 odmr; /* 0xD_3400 - Outbound doorbell mode register */
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+ u32 odsr; /* 0xD_3404 - Outbound doorbell status register */
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u32 res0[4];
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u32 res0[4];
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- u32 oddpr;
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- u32 oddatr;
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+ u32 oddpr; /* 0xD_3418 - Outbound doorbell destination port
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+ register */
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+ u32 oddatr; /* 0xD_341c - Outbound doorbell destination attributes
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+ register */
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u32 res1[3];
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u32 res1[3];
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- u32 odretcr;
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+ u32 odretcr; /* 0xD_342C - Outbound doorbell retry error threshold
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+ configuration register */
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u32 res2[12];
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u32 res2[12];
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- u32 dmr;
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- u32 dsr;
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+ u32 dmr; /* 0xD_3460 - Inbound doorbell mode register */
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+ u32 dsr; /* 0xD_3464 - Inbound doorbell status register */
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u32 pad8;
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u32 pad8;
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- u32 dqdpar;
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+ u32 dqdpar; /* 0xD_346C - Inbound doorbell queue dequeue Pointer
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+ address register */
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u32 pad9;
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u32 pad9;
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- u32 dqepar;
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+ u32 dqepar; /* 0xD_3474 - Inbound doorbell Queue enqueue pointer
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+ address register */
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u32 pad10[26];
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u32 pad10[26];
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- u32 pwmr;
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- u32 pwsr;
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- u32 epwqbar;
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- u32 pwqbar;
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+ u32 pwmr; /* 0xD_34E0 - Inbound port-write mode register */
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+ u32 pwsr; /* 0xD_34E4 - Inbound port-write status register */
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+ u32 epwqbar; /* 0xD_34E8 - Extended Port-Write Queue Base Address
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+ register */
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+ u32 pwqbar; /* 0xD_34EC - Inbound port-write queue base address
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+ register */
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};
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};
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struct rio_tx_desc {
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struct rio_tx_desc {
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