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@@ -87,6 +87,8 @@ module_param(fasteoi, bool, S_IRUGO);
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static bool __read_mostly enable_apicv = 1;
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module_param(enable_apicv, bool, S_IRUGO);
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+static bool __read_mostly enable_shadow_vmcs = 1;
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+module_param_named(enable_shadow_vmcs, enable_shadow_vmcs, bool, S_IRUGO);
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/*
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* If nested=1, nested virtualization is supported, i.e., guests may use
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* VMX and be a hypervisor for its own guests. If nested=0, guests may not
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@@ -940,6 +942,18 @@ static inline bool cpu_has_vmx_wbinvd_exit(void)
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SECONDARY_EXEC_WBINVD_EXITING;
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}
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+static inline bool cpu_has_vmx_shadow_vmcs(void)
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+{
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+ u64 vmx_msr;
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+ rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
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+ /* check if the cpu supports writing r/o exit information fields */
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+ if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
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+ return false;
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+
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+ return vmcs_config.cpu_based_2nd_exec_ctrl &
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+ SECONDARY_EXEC_SHADOW_VMCS;
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+}
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+
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static inline bool report_flexpriority(void)
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{
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return flexpriority_enabled;
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@@ -2632,7 +2646,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
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SECONDARY_EXEC_RDTSCP |
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SECONDARY_EXEC_ENABLE_INVPCID |
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SECONDARY_EXEC_APIC_REGISTER_VIRT |
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- SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY;
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+ SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
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+ SECONDARY_EXEC_SHADOW_VMCS;
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if (adjust_vmx_controls(min2, opt2,
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MSR_IA32_VMX_PROCBASED_CTLS2,
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&_cpu_based_2nd_exec_control) < 0)
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@@ -2833,6 +2848,8 @@ static __init int hardware_setup(void)
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if (!cpu_has_vmx_vpid())
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enable_vpid = 0;
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+ if (!cpu_has_vmx_shadow_vmcs())
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+ enable_shadow_vmcs = 0;
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if (!cpu_has_vmx_ept() ||
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!cpu_has_vmx_ept_4levels()) {
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@@ -4077,6 +4094,12 @@ static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
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exec_control &= ~(SECONDARY_EXEC_APIC_REGISTER_VIRT |
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SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY);
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exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE;
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+ /* SECONDARY_EXEC_SHADOW_VMCS is enabled when L1 executes VMPTRLD
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+ (handle_vmptrld).
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+ We can NOT enable shadow_vmcs here because we don't have yet
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+ a current VMCS12
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+ */
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+ exec_control &= ~SECONDARY_EXEC_SHADOW_VMCS;
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return exec_control;
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}
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