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@@ -49,7 +49,6 @@
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#include <linux/of.h>
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#include "core.h"
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-#include "io.h"
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/*
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* All these registers belong to OMAP's Wrapper around the
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@@ -143,6 +142,17 @@ struct dwc3_omap {
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u32 dma_status:1;
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};
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+static inline u32 dwc3_omap_readl(void __iomem *base, u32 offset)
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+{
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+ return readl(base + offset);
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+}
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+
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+static inline void dwc3_omap_writel(void __iomem *base, u32 offset, u32 value)
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+{
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+ writel(value, base + offset);
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+}
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+
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+
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static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
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{
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struct dwc3_omap *omap = _omap;
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@@ -150,7 +160,7 @@ static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
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spin_lock(&omap->lock);
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- reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_1);
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+ reg = dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_1);
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if (reg & USBOTGSS_IRQ1_DMADISABLECLR) {
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dev_dbg(omap->dev, "DMA Disable was Cleared\n");
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@@ -184,10 +194,10 @@ static irqreturn_t dwc3_omap_interrupt(int irq, void *_omap)
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if (reg & USBOTGSS_IRQ1_IDPULLUP_FALL)
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dev_dbg(omap->dev, "IDPULLUP Fall\n");
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- dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg);
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+ dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_1, reg);
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- reg = dwc3_readl(omap->base, USBOTGSS_IRQSTATUS_0);
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- dwc3_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg);
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+ reg = dwc3_omap_readl(omap->base, USBOTGSS_IRQSTATUS_0);
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+ dwc3_omap_writel(omap->base, USBOTGSS_IRQSTATUS_0, reg);
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spin_unlock(&omap->lock);
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@@ -270,7 +280,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
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omap->base = base;
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omap->dwc3 = dwc3;
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- reg = dwc3_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS);
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+ reg = dwc3_omap_readl(omap->base, USBOTGSS_UTMI_OTG_STATUS);
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utmi_mode = of_get_property(node, "utmi-mode", &size);
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if (utmi_mode && size == sizeof(*utmi_mode)) {
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@@ -293,10 +303,10 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
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}
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}
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- dwc3_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg);
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+ dwc3_omap_writel(omap->base, USBOTGSS_UTMI_OTG_STATUS, reg);
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/* check the DMA Status */
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- reg = dwc3_readl(omap->base, USBOTGSS_SYSCONFIG);
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+ reg = dwc3_omap_readl(omap->base, USBOTGSS_SYSCONFIG);
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omap->dma_status = !!(reg & USBOTGSS_SYSCONFIG_DMADISABLE);
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/* Set No-Idle and No-Standby */
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@@ -306,7 +316,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
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reg |= (USBOTGSS_SYSCONFIG_STANDBYMODE(USBOTGSS_STANDBYMODE_NO_STANDBY)
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| USBOTGSS_SYSCONFIG_IDLEMODE(USBOTGSS_IDLEMODE_NO_IDLE));
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- dwc3_writel(omap->base, USBOTGSS_SYSCONFIG, reg);
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+ dwc3_omap_writel(omap->base, USBOTGSS_SYSCONFIG, reg);
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ret = devm_request_irq(dev, omap->irq, dwc3_omap_interrupt, 0,
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"dwc3-omap", omap);
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@@ -318,7 +328,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
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/* enable all IRQs */
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reg = USBOTGSS_IRQO_COREIRQ_ST;
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- dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg);
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+ dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_0, reg);
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reg = (USBOTGSS_IRQ1_OEVT |
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USBOTGSS_IRQ1_DRVVBUS_RISE |
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@@ -330,7 +340,7 @@ static int __devinit dwc3_omap_probe(struct platform_device *pdev)
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USBOTGSS_IRQ1_DISCHRGVBUS_FALL |
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USBOTGSS_IRQ1_IDPULLUP_FALL);
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- dwc3_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg);
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+ dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_SET_1, reg);
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ret = platform_device_add_resources(dwc3, pdev->resource,
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pdev->num_resources);
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