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@@ -70,6 +70,20 @@ static void __init emit_cache_params(void)
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boot_cpu_data.dcache.alias_mask,
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boot_cpu_data.dcache.n_aliases);
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+ /*
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+ * Emit Secondary Cache parameters if the CPU has a probed L2.
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+ */
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+ if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
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+ printk("S-cache : n_ways=%d n_sets=%d way_incr=%d\n",
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+ boot_cpu_data.scache.ways,
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+ boot_cpu_data.scache.sets,
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+ boot_cpu_data.scache.way_incr);
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+ printk("S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n",
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+ boot_cpu_data.scache.entry_mask,
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+ boot_cpu_data.scache.alias_mask,
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+ boot_cpu_data.scache.n_aliases);
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+ }
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+
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if (!__flush_dcache_segment_fn)
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panic("unknown number of cache ways\n");
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}
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@@ -81,6 +95,7 @@ void __init p3_cache_init(void)
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{
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compute_alias(&boot_cpu_data.icache);
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compute_alias(&boot_cpu_data.dcache);
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+ compute_alias(&boot_cpu_data.scache);
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switch (boot_cpu_data.dcache.ways) {
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case 1:
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