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@@ -4870,7 +4870,6 @@ static void tg3_restore_pci_state(struct tg3 *tp)
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pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
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pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
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if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
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if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
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- u32 val;
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/* Chip reset on 5780 will reset MSI enable bit,
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/* Chip reset on 5780 will reset MSI enable bit,
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* so need to restore it.
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* so need to restore it.
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@@ -5027,7 +5026,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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tw32(GRC_MODE, tp->grc_mode);
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tw32(GRC_MODE, tp->grc_mode);
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if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
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if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
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- u32 val = tr32(0xc4);
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+ val = tr32(0xc4);
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tw32(0xc4, val | (1 << 15));
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tw32(0xc4, val | (1 << 15));
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}
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}
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@@ -5056,7 +5055,7 @@ static int tg3_chip_reset(struct tg3 *tp)
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if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
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if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
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tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
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tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
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- u32 val = tr32(0x7c00);
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+ val = tr32(0x7c00);
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tw32(0x7c00, val | (1 << 25));
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tw32(0x7c00, val | (1 << 25));
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}
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}
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@@ -7991,7 +7990,7 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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buf = data;
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buf = data;
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if (b_offset || odd_len) {
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if (b_offset || odd_len) {
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buf = kmalloc(len, GFP_KERNEL);
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buf = kmalloc(len, GFP_KERNEL);
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- if (buf == 0)
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+ if (!buf)
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return -ENOMEM;
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return -ENOMEM;
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if (b_offset)
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if (b_offset)
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memcpy(buf, &start, 4);
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memcpy(buf, &start, 4);
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@@ -8420,7 +8419,7 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
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static int tg3_test_nvram(struct tg3 *tp)
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static int tg3_test_nvram(struct tg3 *tp)
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{
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{
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u32 *buf, csum, magic;
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u32 *buf, csum, magic;
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- int i, j, err = 0, size;
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+ int i, j, k, err = 0, size;
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if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
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if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
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return -EIO;
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return -EIO;
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@@ -8474,7 +8473,6 @@ static int tg3_test_nvram(struct tg3 *tp)
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u8 data[NVRAM_SELFBOOT_DATA_SIZE];
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u8 data[NVRAM_SELFBOOT_DATA_SIZE];
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u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
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u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
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u8 *buf8 = (u8 *) buf;
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u8 *buf8 = (u8 *) buf;
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- int j, k;
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/* Separate the parity bits and the data bytes. */
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/* Separate the parity bits and the data bytes. */
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for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
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for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
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@@ -10730,7 +10728,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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*/
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*/
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) {
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u32 pm_reg;
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u32 pm_reg;
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- u16 pci_cmd;
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tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
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tp->tg3_flags |= TG3_FLAG_PCIX_TARGET_HWBUG;
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@@ -11876,7 +11873,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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INIT_WORK(&tp->reset_task, tg3_reset_task);
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INIT_WORK(&tp->reset_task, tg3_reset_task);
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tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);
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tp->regs = ioremap_nocache(tg3reg_base, tg3reg_len);
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- if (tp->regs == 0UL) {
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+ if (!tp->regs) {
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printk(KERN_ERR PFX "Cannot map device registers, "
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printk(KERN_ERR PFX "Cannot map device registers, "
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"aborting.\n");
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"aborting.\n");
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err = -ENOMEM;
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err = -ENOMEM;
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