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@@ -44,11 +44,6 @@ static inline u16 ep93xx_pwm_read_tc(struct ep93xx_pwm *pwm)
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return readl(pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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}
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-static inline void ep93xx_pwm_write_dc(struct ep93xx_pwm *pwm, u16 value)
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-{
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- writel(value, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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-}
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-
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static inline void ep93xx_pwm_enable(struct ep93xx_pwm *pwm)
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{
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writel(0x1, pwm->mmio_base + EP93XX_PWMx_ENABLE);
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@@ -153,9 +148,9 @@ static ssize_t ep93xx_pwm_set_freq(struct device *dev,
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/* If pwm is running, order is important */
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if (val > term) {
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writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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- ep93xx_pwm_write_dc(pwm, duty);
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+ writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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} else {
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- ep93xx_pwm_write_dc(pwm, duty);
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+ writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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writel(val, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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}
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@@ -191,7 +186,9 @@ static ssize_t ep93xx_pwm_set_duty_percent(struct device *dev,
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if (val > 0 && val < 100) {
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u32 term = ep93xx_pwm_read_tc(pwm);
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- ep93xx_pwm_write_dc(pwm, ((term + 1) * val / 100) - 1);
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+ u32 duty = ((term + 1) * val / 100) - 1;
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+
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+ writel(duty, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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pwm->duty_percent = val;
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return count;
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}
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@@ -286,7 +283,7 @@ static int __init ep93xx_pwm_probe(struct platform_device *pdev)
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/* disable pwm at startup. Avoids zero value. */
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ep93xx_pwm_disable(pwm);
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writel(EP93XX_PWM_MAX_COUNT, pwm->mmio_base + EP93XX_PWMx_TERM_COUNT);
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- ep93xx_pwm_write_dc(pwm, EP93XX_PWM_MAX_COUNT / 2);
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+ writel(EP93XX_PWM_MAX_COUNT/2, pwm->mmio_base + EP93XX_PWMx_DUTY_CYCLE);
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clk_enable(pwm->clk);
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