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@@ -1023,8 +1023,8 @@ static int ahci_exec_polled_cmd(struct ata_port *ap, int pmp,
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return 0;
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}
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-static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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- unsigned long deadline)
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+static int ahci_do_softreset(struct ata_port *ap, unsigned int *class,
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+ int pmp, unsigned long deadline)
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{
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const char *reason = NULL;
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unsigned long now, msecs;
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@@ -1054,7 +1054,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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msecs = jiffies_to_msecs(deadline - now);
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tf.ctl |= ATA_SRST;
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- if (ahci_exec_polled_cmd(ap, 0, &tf, 0,
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+ if (ahci_exec_polled_cmd(ap, pmp, &tf, 0,
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AHCI_CMD_RESET | AHCI_CMD_CLR_BUSY, msecs)) {
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rc = -EIO;
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reason = "1st FIS failed";
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@@ -1066,7 +1066,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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/* issue the second D2H Register FIS */
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tf.ctl &= ~ATA_SRST;
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- ahci_exec_polled_cmd(ap, 0, &tf, 0, 0, 0);
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+ ahci_exec_polled_cmd(ap, pmp, &tf, 0, 0, 0);
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/* spec mandates ">= 2ms" before checking status.
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* We wait 150ms, because that was the magic delay used for
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@@ -1094,6 +1094,12 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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return rc;
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}
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+static int ahci_softreset(struct ata_port *ap, unsigned int *class,
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+ unsigned long deadline)
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+{
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+ return ahci_do_softreset(ap, class, 0, deadline);
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+}
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+
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static int ahci_hardreset(struct ata_port *ap, unsigned int *class,
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unsigned long deadline)
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{
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