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@@ -735,6 +735,8 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
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struct nouveau_pm_memtiming *boot,
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struct nouveau_pm_memtiming *t)
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{
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+ u8 rver, rlen, *ramcfg = nouveau_perf_ramcfg(dev, freq, &rver, &rlen);
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+
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if (len < 15) {
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t->drive_strength = boot->drive_strength;
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t->odt = boot->odt;
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@@ -763,9 +765,17 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
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/* CAS */
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((nv_mem_cl_lut_gddr3[e->tCL] & 0x7) << 4) |
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((nv_mem_cl_lut_gddr3[e->tCL] & 0x8) >> 2);
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+
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t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength |
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(t->odt << 2) |
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(nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4;
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+ if (ramcfg && rver == 0x00) {
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+ /* DLL enable/disable */
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+ t->mr[1] &= ~0x00000040;
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+ if (ramcfg[3] & 0x08)
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+ t->mr[1] |= 0x00000040;
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+ }
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+
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t->mr[2] = boot->mr[2];
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NV_DEBUG(dev, "(%u) MR: %08x %08x %08x", t->id,
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