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@@ -241,3 +241,16 @@ void __init mips_pcibios_init(void)
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register_pci_controller(controller);
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register_pci_controller(controller);
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}
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}
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+
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+/* Enable PCI 2.1 compatibility in PIIX4 */
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+static void __init quirk_dlcsetup(struct pci_dev *dev)
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+{
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+ u8 odlc, ndlc;
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+ (void) pci_read_config_byte(dev, 0x82, &odlc);
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+ /* Enable passive releases and delayed transaction */
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+ ndlc = odlc | 7;
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+ (void) pci_write_config_byte(dev, 0x82, ndlc);
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+}
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+
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+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
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+ quirk_dlcsetup);
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