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@@ -209,9 +209,6 @@ idtg2_get_domain(struct rio_mport *mport, u16 destid, u8 hopcount,
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static int
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idtg2_em_init(struct rio_dev *rdev)
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{
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- struct rio_mport *mport = rdev->net->hport;
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- u16 destid = rdev->rswitch->destid;
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- u8 hopcount = rdev->rswitch->hopcount;
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u32 regval;
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int i, tmp;
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@@ -220,29 +217,25 @@ idtg2_em_init(struct rio_dev *rdev)
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* All standard EM configuration should be performed at upper level.
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*/
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- pr_debug("RIO: %s [%d:%d]\n", __func__, destid, hopcount);
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+ pr_debug("RIO: %s [%d:%d]\n", __func__, rdev->destid, rdev->hopcount);
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/* Set Port-Write info CSR: PRIO=3 and CRF=1 */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_PW_INFO_CSR, 0x0000e000);
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+ rio_write_config_32(rdev, IDT_PW_INFO_CSR, 0x0000e000);
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/*
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* Configure LT LAYER error reporting.
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*/
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/* Enable standard (RIO.p8) error reporting */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_LT_ERR_REPORT_EN,
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+ rio_write_config_32(rdev, IDT_LT_ERR_REPORT_EN,
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REM_LTL_ERR_ILLTRAN | REM_LTL_ERR_UNSOLR |
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REM_LTL_ERR_UNSUPTR);
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/* Use Port-Writes for LT layer error reporting.
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* Enable per-port reset
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*/
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- rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_DEV_CTRL_1, ®val);
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_DEV_CTRL_1,
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+ rio_read_config_32(rdev, IDT_DEV_CTRL_1, ®val);
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+ rio_write_config_32(rdev, IDT_DEV_CTRL_1,
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regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH);
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/*
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@@ -250,45 +243,40 @@ idtg2_em_init(struct rio_dev *rdev)
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*/
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/* Report all RIO.p8 errors supported by device */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_PORT_ERR_REPORT_EN_BC, 0x807e8037);
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+ rio_write_config_32(rdev, IDT_PORT_ERR_REPORT_EN_BC, 0x807e8037);
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/* Configure reporting of implementation specific errors/events */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_PORT_ISERR_REPORT_EN_BC, IDT_PORT_INIT_TX_ACQUIRED);
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+ rio_write_config_32(rdev, IDT_PORT_ISERR_REPORT_EN_BC,
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+ IDT_PORT_INIT_TX_ACQUIRED);
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/* Use Port-Writes for port error reporting and enable error logging */
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tmp = RIO_GET_TOTAL_PORTS(rdev->swpinfo);
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for (i = 0; i < tmp; i++) {
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- rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_PORT_OPS(i), ®val);
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- rio_mport_write_config_32(mport, destid, hopcount,
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+ rio_read_config_32(rdev, IDT_PORT_OPS(i), ®val);
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+ rio_write_config_32(rdev,
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IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW |
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IDT_PORT_OPS_PL_ELOG |
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IDT_PORT_OPS_LL_ELOG |
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IDT_PORT_OPS_LT_ELOG);
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}
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/* Overwrite error log if full */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_ERR_CAP, IDT_ERR_CAP_LOG_OVERWR);
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+ rio_write_config_32(rdev, IDT_ERR_CAP, IDT_ERR_CAP_LOG_OVERWR);
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/*
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* Configure LANE error reporting.
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*/
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/* Disable line error reporting */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_LANE_ERR_REPORT_EN_BC, 0);
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+ rio_write_config_32(rdev, IDT_LANE_ERR_REPORT_EN_BC, 0);
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/* Use Port-Writes for lane error reporting (when enabled)
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* (do per-lane update because lanes may have different configuration)
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*/
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tmp = (rdev->did == RIO_DID_IDTCPS1848) ? 48 : 16;
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for (i = 0; i < tmp; i++) {
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- rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_LANE_CTRL(i), ®val);
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_LANE_CTRL(i), regval | IDT_LANE_CTRL_GENPW);
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+ rio_read_config_32(rdev, IDT_LANE_CTRL(i), ®val);
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+ rio_write_config_32(rdev, IDT_LANE_CTRL(i),
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+ regval | IDT_LANE_CTRL_GENPW);
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}
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/*
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@@ -296,41 +284,32 @@ idtg2_em_init(struct rio_dev *rdev)
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*/
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/* Disable JTAG and I2C Error capture */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_AUX_PORT_ERR_CAP_EN, 0);
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+ rio_write_config_32(rdev, IDT_AUX_PORT_ERR_CAP_EN, 0);
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/* Disable JTAG and I2C Error reporting/logging */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_AUX_ERR_REPORT_EN, 0);
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+ rio_write_config_32(rdev, IDT_AUX_ERR_REPORT_EN, 0);
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/* Disable Port-Write notification from JTAG */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_JTAG_CTRL, 0);
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+ rio_write_config_32(rdev, IDT_JTAG_CTRL, 0);
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/* Disable Port-Write notification from I2C */
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- rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_I2C_MCTRL, ®val);
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_I2C_MCTRL,
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- regval & ~IDT_I2C_MCTRL_GENPW);
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+ rio_read_config_32(rdev, IDT_I2C_MCTRL, ®val);
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+ rio_write_config_32(rdev, IDT_I2C_MCTRL, regval & ~IDT_I2C_MCTRL_GENPW);
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/*
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* Configure CFG_BLK error reporting.
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*/
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/* Disable Configuration Block error capture */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_CFGBLK_ERR_CAPTURE_EN, 0);
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+ rio_write_config_32(rdev, IDT_CFGBLK_ERR_CAPTURE_EN, 0);
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/* Disable Port-Writes for Configuration Block error reporting */
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- rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_CFGBLK_ERR_REPORT, ®val);
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_CFGBLK_ERR_REPORT,
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- regval & ~IDT_CFGBLK_ERR_REPORT_GENPW);
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+ rio_read_config_32(rdev, IDT_CFGBLK_ERR_REPORT, ®val);
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+ rio_write_config_32(rdev, IDT_CFGBLK_ERR_REPORT,
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+ regval & ~IDT_CFGBLK_ERR_REPORT_GENPW);
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/* set TVAL = ~50us */
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- rio_mport_write_config_32(mport, destid, hopcount,
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+ rio_write_config_32(rdev,
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rdev->phys_efptr + RIO_PORT_LINKTO_CTL_CSR, 0x8e << 8);
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return 0;
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@@ -339,18 +318,15 @@ idtg2_em_init(struct rio_dev *rdev)
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static int
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idtg2_em_handler(struct rio_dev *rdev, u8 portnum)
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{
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- struct rio_mport *mport = rdev->net->hport;
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- u16 destid = rdev->rswitch->destid;
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- u8 hopcount = rdev->rswitch->hopcount;
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u32 regval, em_perrdet, em_ltlerrdet;
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- rio_mport_read_config_32(mport, destid, hopcount,
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+ rio_read_config_32(rdev,
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rdev->em_efptr + RIO_EM_LTL_ERR_DETECT, &em_ltlerrdet);
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if (em_ltlerrdet) {
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/* Service Logical/Transport Layer Error(s) */
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if (em_ltlerrdet & REM_LTL_ERR_IMPSPEC) {
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/* Implementation specific error reported */
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- rio_mport_read_config_32(mport, destid, hopcount,
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+ rio_read_config_32(rdev,
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IDT_ISLTL_ADDRESS_CAP, ®val);
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pr_debug("RIO: %s Implementation Specific LTL errors" \
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@@ -358,13 +334,12 @@ idtg2_em_handler(struct rio_dev *rdev, u8 portnum)
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rio_name(rdev), em_ltlerrdet, regval);
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/* Clear implementation specific address capture CSR */
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- rio_mport_write_config_32(mport, destid, hopcount,
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- IDT_ISLTL_ADDRESS_CAP, 0);
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+ rio_write_config_32(rdev, IDT_ISLTL_ADDRESS_CAP, 0);
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}
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}
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- rio_mport_read_config_32(mport, destid, hopcount,
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+ rio_read_config_32(rdev,
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rdev->em_efptr + RIO_EM_PN_ERR_DETECT(portnum), &em_perrdet);
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if (em_perrdet) {
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/* Service Port-Level Error(s) */
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@@ -372,14 +347,14 @@ idtg2_em_handler(struct rio_dev *rdev, u8 portnum)
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/* Implementation Specific port error reported */
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/* Get IS errors reported */
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- rio_mport_read_config_32(mport, destid, hopcount,
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+ rio_read_config_32(rdev,
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IDT_PORT_ISERR_DET(portnum), ®val);
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pr_debug("RIO: %s Implementation Specific Port" \
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" errors 0x%x\n", rio_name(rdev), regval);
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/* Clear all implementation specific events */
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- rio_mport_write_config_32(mport, destid, hopcount,
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+ rio_write_config_32(rdev,
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IDT_PORT_ISERR_DET(portnum), 0);
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}
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}
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@@ -391,14 +366,10 @@ static ssize_t
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idtg2_show_errlog(struct device *dev, struct device_attribute *attr, char *buf)
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{
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struct rio_dev *rdev = to_rio_dev(dev);
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- struct rio_mport *mport = rdev->net->hport;
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- u16 destid = rdev->rswitch->destid;
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- u8 hopcount = rdev->rswitch->hopcount;
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ssize_t len = 0;
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u32 regval;
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- while (!rio_mport_read_config_32(mport, destid, hopcount,
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- IDT_ERR_RD, ®val)) {
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+ while (!rio_read_config_32(rdev, IDT_ERR_RD, ®val)) {
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if (!regval) /* 0 = end of log */
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break;
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len += snprintf(buf + len, PAGE_SIZE - len,
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