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@@ -306,6 +306,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
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if (cpu_has_llsc && R10000_LLSC_WAR) {
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__asm__ __volatile__ (
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+ " .set mips3 \n"
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" li %[err], 0 \n"
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"1: ll %[old], (%[addr]) \n"
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" move %[tmp], %[new] \n"
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@@ -320,6 +321,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
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" "STR(PTR)" 1b, 4b \n"
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" "STR(PTR)" 2b, 4b \n"
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" .previous \n"
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+ " .set mips0 \n"
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: [old] "=&r" (old),
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[err] "=&r" (err),
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[tmp] "=&r" (tmp)
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@@ -329,6 +331,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
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: "memory");
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} else if (cpu_has_llsc) {
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__asm__ __volatile__ (
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+ " .set mips3 \n"
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" li %[err], 0 \n"
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"1: ll %[old], (%[addr]) \n"
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" move %[tmp], %[new] \n"
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@@ -347,6 +350,7 @@ static inline int mips_atomic_set(struct pt_regs *regs,
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" "STR(PTR)" 1b, 5b \n"
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" "STR(PTR)" 2b, 5b \n"
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" .previous \n"
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+ " .set mips0 \n"
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: [old] "=&r" (old),
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[err] "=&r" (err),
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[tmp] "=&r" (tmp)
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