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@@ -640,7 +640,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah,
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pPdGainBoundaries[i] =
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min((u16)AR5416_MAX_RATE_POWER, pPdGainBoundaries[i]);
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- if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) {
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+ if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
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minDelta = pPdGainBoundaries[0] - 23;
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pPdGainBoundaries[0] = 23;
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} else {
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@@ -755,7 +755,7 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
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REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
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for (i = 0; i < AR5416_MAX_CHAINS; i++) {
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- if (AR_SREV_5416_V20_OR_LATER(ah) &&
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+ if (AR_SREV_5416_20_OR_LATER(ah) &&
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(ah->rxchainmask == 5 || ah->txchainmask == 5) &&
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(i != 0)) {
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regChainOffset = (i == 1) ? 0x2000 : 0x1000;
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@@ -771,7 +771,7 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
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&tMinCalPower, gainBoundaries,
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pdadcValues, numXpdGain);
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- if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
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+ if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
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REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
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SM(pdGainOverlap_t2,
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AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
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@@ -1707,7 +1707,7 @@ static bool ath9k_hw_def_set_board_values(struct ath_hw *ah,
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break;
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}
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- if (AR_SREV_5416_V20_OR_LATER(ah) &&
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+ if (AR_SREV_5416_20_OR_LATER(ah) &&
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(ah->rxchainmask == 5 || ah->txchainmask == 5)
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&& (i != 0))
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regChainOffset = (i == 1) ? 0x2000 : 0x1000;
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@@ -1728,7 +1728,7 @@ static bool ath9k_hw_def_set_board_values(struct ath_hw *ah,
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SM(pModal->iqCalQCh[i],
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AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
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- if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
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+ if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
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if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
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txRxAttenLocal = pModal->txRxAttenCh[i];
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if (AR_SREV_9280_10_OR_LATER(ah)) {
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@@ -2094,7 +2094,7 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah,
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pPdGainBoundaries[i] =
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min((u16)AR5416_MAX_RATE_POWER, pPdGainBoundaries[i]);
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- if ((i == 0) && !AR_SREV_5416_V20_OR_LATER(ah)) {
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+ if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
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minDelta = pPdGainBoundaries[0] - 23;
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pPdGainBoundaries[0] = 23;
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} else {
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@@ -2228,7 +2228,7 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
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xpdGainValues[2]);
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for (i = 0; i < AR5416_MAX_CHAINS; i++) {
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- if (AR_SREV_5416_V20_OR_LATER(ah) &&
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+ if (AR_SREV_5416_20_OR_LATER(ah) &&
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(ah->rxchainmask == 5 || ah->txchainmask == 5) &&
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(i != 0)) {
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regChainOffset = (i == 1) ? 0x2000 : 0x1000;
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@@ -2262,7 +2262,7 @@ static bool ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
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numXpdGain);
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}
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- if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah)) {
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+ if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
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if (OLC_FOR_AR9280_20_LATER) {
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REG_WRITE(ah,
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AR_PHY_TPCRG5 + regChainOffset,
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