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@@ -25,6 +25,29 @@
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#include <asm/i8259.h>
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#include <asm/apb_timer.h>
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+/*
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+ * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock,
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+ * cmdline option x86_mrst_timer can be used to override the configuration
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+ * to prefer one or the other.
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+ * at runtime, there are basically three timer configurations:
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+ * 1. per cpu apbt clock only
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+ * 2. per cpu always-on lapic clocks only, this is Penwell/Medfield only
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+ * 3. per cpu lapic clock (C3STOP) and one apbt clock, with broadcast.
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+ *
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+ * by default (without cmdline option), platform code first detects cpu type
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+ * to see if we are on lincroft or penwell, then set up both lapic or apbt
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+ * clocks accordingly.
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+ * i.e. by default, medfield uses configuration #2, moorestown uses #1.
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+ * config #3 is supported but not recommended on medfield.
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+ *
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+ * rating and feature summary:
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+ * lapic (with C3STOP) --------- 100
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+ * apbt (always-on) ------------ 110
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+ * lapic (always-on,ARAT) ------ 150
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+ */
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+
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+int mrst_timer_options __cpuinitdata;
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+
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static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
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static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
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static int mrst_cpu_chip;
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@@ -169,18 +192,6 @@ int __init sfi_parse_mrtc(struct sfi_table_header *table)
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return 0;
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}
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-/*
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- * the secondary clock in Moorestown can be APBT or LAPIC clock, default to
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- * APBT but cmdline option can also override it.
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- */
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-static void __cpuinit mrst_setup_secondary_clock(void)
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-{
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- /* restore default lapic clock if disabled by cmdline */
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- if (disable_apbt_percpu)
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- return setup_secondary_APIC_clock();
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- apbt_setup_secondary_clock();
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-}
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-
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static unsigned long __init mrst_calibrate_tsc(void)
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{
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unsigned long flags, fast_calibrate;
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@@ -197,6 +208,21 @@ static unsigned long __init mrst_calibrate_tsc(void)
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void __init mrst_time_init(void)
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{
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+ switch (mrst_timer_options) {
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+ case MRST_TIMER_APBT_ONLY:
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+ break;
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+ case MRST_TIMER_LAPIC_APBT:
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+ x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
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+ x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
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+ break;
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+ default:
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+ if (!boot_cpu_has(X86_FEATURE_ARAT))
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+ break;
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+ x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock;
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+ x86_cpuinit.setup_percpu_clockev = setup_secondary_APIC_clock;
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+ return;
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+ }
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+ /* we need at least one APB timer */
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sfi_table_parse(SFI_SIG_MTMR, NULL, NULL, sfi_parse_mtmr);
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pre_init_apic_IRQ0();
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apbt_time_init();
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@@ -207,17 +233,6 @@ void __init mrst_rtc_init(void)
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sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc);
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}
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-/*
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- * if we use per cpu apb timer, the bootclock already setup. if we use lapic
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- * timer and one apbt timer for broadcast, we need to set up lapic boot clock.
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- */
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-static void __init mrst_setup_boot_clock(void)
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-{
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- pr_info("%s: per cpu apbt flag %d \n", __func__, disable_apbt_percpu);
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- if (disable_apbt_percpu)
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- setup_boot_APIC_clock();
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-};
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-
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int mrst_identify_cpu(void)
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{
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return mrst_cpu_chip;
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@@ -250,13 +265,13 @@ void __init x86_mrst_early_setup(void)
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x86_init.resources.reserve_resources = x86_init_noop;
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x86_init.timers.timer_init = mrst_time_init;
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- x86_init.timers.setup_percpu_clockev = mrst_setup_boot_clock;
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+ x86_init.timers.setup_percpu_clockev = x86_init_noop;
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x86_init.irqs.pre_vector_init = x86_init_noop;
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x86_init.oem.arch_setup = mrst_arch_setup;
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- x86_cpuinit.setup_percpu_clockev = mrst_setup_secondary_clock;
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+ x86_cpuinit.setup_percpu_clockev = apbt_setup_secondary_clock;
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x86_platform.calibrate_tsc = mrst_calibrate_tsc;
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x86_init.pci.init = pci_mrst_init;
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@@ -269,3 +284,26 @@ void __init x86_mrst_early_setup(void)
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x86_init.mpparse.get_smp_config = x86_init_uint_noop;
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}
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+
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+/*
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+ * if user does not want to use per CPU apb timer, just give it a lower rating
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+ * than local apic timer and skip the late per cpu timer init.
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+ */
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+static inline int __init setup_x86_mrst_timer(char *arg)
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+{
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+ if (!arg)
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+ return -EINVAL;
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+
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+ if (strcmp("apbt_only", arg) == 0)
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+ mrst_timer_options = MRST_TIMER_APBT_ONLY;
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+ else if (strcmp("lapic_and_apbt", arg) == 0)
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+ mrst_timer_options = MRST_TIMER_LAPIC_APBT;
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+ else {
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+ pr_warning("X86 MRST timer option %s not recognised"
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+ " use x86_mrst_timer=apbt_only or lapic_and_apbt\n",
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+ arg);
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+ return -EINVAL;
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+ }
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+ return 0;
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+}
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+__setup("x86_mrst_timer=", setup_x86_mrst_timer);
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Jacob Pan