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@@ -108,9 +108,10 @@ static struct pci_ops pcie_ops = {
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.write = pcie_wr_conf,
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};
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-static int __init pcie0_ioresources_setup(struct pci_sys_data *sys)
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+static void __init pcie0_ioresources_init(struct pcie_port *pp)
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{
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- struct pcie_port *pp = (struct pcie_port *)sys->private_data;
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+ pp->base = (void __iomem *)PCIE_VIRT_BASE;
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+ pp->irq = IRQ_KIRKWOOD_PCIE;
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/*
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* IORESOURCE_IO
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@@ -119,9 +120,6 @@ static int __init pcie0_ioresources_setup(struct pci_sys_data *sys)
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pp->res[0].start = KIRKWOOD_PCIE_IO_PHYS_BASE;
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pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE_IO_SIZE - 1;
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pp->res[0].flags = IORESOURCE_IO;
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- if (request_resource(&ioport_resource, &pp->res[0]))
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- panic("Request PCIe 0 IO resource failed\n");
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- sys->resource[0] = &pp->res[0];
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/*
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* IORESOURCE_MEM
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@@ -130,19 +128,12 @@ static int __init pcie0_ioresources_setup(struct pci_sys_data *sys)
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pp->res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE;
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pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1;
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pp->res[1].flags = IORESOURCE_MEM;
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- if (request_resource(&iomem_resource, &pp->res[1]))
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- panic("Request PCIe 0 Memory resource failed\n");
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- sys->resource[1] = &pp->res[1];
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-
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- sys->resource[2] = NULL;
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- sys->io_offset = 0;
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-
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- return 1;
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}
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-static int __init pcie1_ioresources_setup(struct pci_sys_data *sys)
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+static void __init pcie1_ioresources_init(struct pcie_port *pp)
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{
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- struct pcie_port *pp = (struct pcie_port *)sys->private_data;
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+ pp->base = (void __iomem *)PCIE1_VIRT_BASE;
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+ pp->irq = IRQ_KIRKWOOD_PCIE1;
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/*
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* IORESOURCE_IO
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@@ -151,9 +142,6 @@ static int __init pcie1_ioresources_setup(struct pci_sys_data *sys)
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pp->res[0].start = KIRKWOOD_PCIE1_IO_PHYS_BASE;
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pp->res[0].end = pp->res[0].start + KIRKWOOD_PCIE1_IO_SIZE - 1;
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pp->res[0].flags = IORESOURCE_IO;
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- if (request_resource(&ioport_resource, &pp->res[0]))
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- panic("Request PCIe 1 IO resource failed\n");
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- sys->resource[0] = &pp->res[0];
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/*
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* IORESOURCE_MEM
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@@ -162,14 +150,6 @@ static int __init pcie1_ioresources_setup(struct pci_sys_data *sys)
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pp->res[1].start = KIRKWOOD_PCIE1_MEM_PHYS_BASE;
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pp->res[1].end = pp->res[1].start + KIRKWOOD_PCIE1_MEM_SIZE - 1;
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pp->res[1].flags = IORESOURCE_MEM;
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- if (request_resource(&iomem_resource, &pp->res[1]))
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- panic("Request PCIe 1 Memory resource failed\n");
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- sys->resource[1] = &pp->res[1];
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-
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- sys->resource[2] = NULL;
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- sys->io_offset = 0;
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-
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- return 1;
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}
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static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
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@@ -193,21 +173,27 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
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switch (index) {
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case 0:
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- pp->base = (void __iomem *)PCIE_VIRT_BASE;
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- pp->irq = IRQ_KIRKWOOD_PCIE;
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kirkwood_clk_ctrl |= CGC_PEX0;
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- pcie0_ioresources_setup(sys);
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+ pcie0_ioresources_init(pp);
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break;
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case 1:
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- pp->base = (void __iomem *)PCIE1_VIRT_BASE;
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- pp->irq = IRQ_KIRKWOOD_PCIE1;
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kirkwood_clk_ctrl |= CGC_PEX1;
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- pcie1_ioresources_setup(sys);
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+ pcie1_ioresources_init(pp);
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break;
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default:
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- panic("PCIe setup: invalid controller");
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+ panic("PCIe setup: invalid controller %d", index);
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}
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+ if (request_resource(&ioport_resource, &pp->res[0]))
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+ panic("Request PCIe%d IO resource failed\n", index);
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+ if (request_resource(&iomem_resource, &pp->res[1]))
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+ panic("Request PCIe%d Memory resource failed\n", index);
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+
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+ sys->resource[0] = &pp->res[0];
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+ sys->resource[1] = &pp->res[1];
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+ sys->resource[2] = NULL;
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+ sys->io_offset = 0;
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+
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/*
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* Generic PCIe unit setup.
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*/
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