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[ARM] VIC: Update asm/hardware/vic.h with PL192 information

The original arch/arm/include/asm/hardware/vic.h was
written for the PL190 ARM VIC implementation, and as
such does not have any information about the PL192
version.

Add details about the PL192 and PL190 specific registers
and any changes between the two units.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Ben Dooks 16 年之前
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a801cd6192
共有 2 個文件被更改,包括 10 次插入8 次删除
  1. 4 4
      arch/arm/common/vic.c
  2. 6 4
      arch/arm/include/asm/hardware/vic.h

+ 4 - 4
arch/arm/common/vic.c

@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 	/*
 	/*
 	 * Make sure we clear all existing interrupts
 	 * Make sure we clear all existing interrupts
 	 */
 	 */
-	writel(0, base + VIC_VECT_ADDR);
+	writel(0, base + VIC_PL190_VECT_ADDR);
 	for (i = 0; i < 19; i++) {
 	for (i = 0; i < 19; i++) {
 		unsigned int value;
 		unsigned int value;
 
 
-		value = readl(base + VIC_VECT_ADDR);
-		writel(value, base + VIC_VECT_ADDR);
+		value = readl(base + VIC_PL190_VECT_ADDR);
+		writel(value, base + VIC_PL190_VECT_ADDR);
 	}
 	}
 
 
 	for (i = 0; i < 16; i++) {
 	for (i = 0; i < 16; i++) {
@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 		writel(VIC_VECT_CNTL_ENABLE | i, reg);
 		writel(VIC_VECT_CNTL_ENABLE | i, reg);
 	}
 	}
 
 
-	writel(32, base + VIC_DEF_VECT_ADDR);
+	writel(32, base + VIC_PL190_DEF_VECT_ADDR);
 
 
 	for (i = 0; i < 32; i++) {
 	for (i = 0; i < 32; i++) {
 		unsigned int irq = irq_start + i;
 		unsigned int irq = irq_start + i;

+ 6 - 4
arch/arm/include/asm/hardware/vic.h

@@ -29,15 +29,17 @@
 #define VIC_INT_SOFT			0x18
 #define VIC_INT_SOFT			0x18
 #define VIC_INT_SOFT_CLEAR		0x1c
 #define VIC_INT_SOFT_CLEAR		0x1c
 #define VIC_PROTECT			0x20
 #define VIC_PROTECT			0x20
-#define VIC_VECT_ADDR			0x30
-#define VIC_DEF_VECT_ADDR		0x34
+#define VIC_PL190_VECT_ADDR		0x30	/* PL190 only */
+#define VIC_PL190_DEF_VECT_ADDR		0x34	/* PL190 only */
 
 
-#define VIC_VECT_ADDR0			0x100	/* 0 to 15 */
-#define VIC_VECT_CNTL0			0x200	/* 0 to 15 */
+#define VIC_VECT_ADDR0			0x100	/* 0 to 15 (0..31 PL192) */
+#define VIC_VECT_CNTL0			0x200	/* 0 to 15 (0..31 PL192) */
 #define VIC_ITCR			0x300	/* VIC test control register */
 #define VIC_ITCR			0x300	/* VIC test control register */
 
 
 #define VIC_VECT_CNTL_ENABLE		(1 << 5)
 #define VIC_VECT_CNTL_ENABLE		(1 << 5)
 
 
+#define VIC_PL192_VECT_ADDR		0xF00
+
 #ifndef __ASSEMBLY__
 #ifndef __ASSEMBLY__
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
 void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
 #endif
 #endif