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[PATCH] powerpc/ppc: Add missing isyncs in head_fsl_booke.S

The e500 core reference manual indicates that isync is required
after mtmsr(DE bit) and mtspr DBCR0.  Add isyncs to make the code
conform to the spec.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Becky Bruce 19 years ago
parent
commit
a7cb03375d
2 changed files with 8 additions and 0 deletions
  1. 4 0
      arch/powerpc/kernel/head_fsl_booke.S
  2. 4 0
      arch/ppc/kernel/head_fsl_booke.S

+ 4 - 0
arch/powerpc/kernel/head_fsl_booke.S

@@ -316,6 +316,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
 	 */
 	lis	r2,DBCR0_IDM@h
 	mtspr	SPRN_DBCR0,r2
+	isync
 	/* clear any residual debug events */
 	li	r2,-1
 	mtspr	SPRN_DBSR,r2
@@ -1002,12 +1003,15 @@ _GLOBAL(giveup_fpu)
 _GLOBAL(abort)
 	li	r13,0
         mtspr   SPRN_DBCR0,r13		/* disable all debug events */
+	isync
 	mfmsr	r13
 	ori	r13,r13,MSR_DE@l	/* Enable Debug Events */
 	mtmsr	r13
+	isync
         mfspr   r13,SPRN_DBCR0
         lis	r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
         mtspr   SPRN_DBCR0,r13
+	isync
 
 _GLOBAL(set_context)
 

+ 4 - 0
arch/ppc/kernel/head_fsl_booke.S

@@ -316,6 +316,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
 	 */
 	lis	r2,DBCR0_IDM@h
 	mtspr	SPRN_DBCR0,r2
+	isync
 	/* clear any residual debug events */
 	li	r2,-1
 	mtspr	SPRN_DBSR,r2
@@ -1002,12 +1003,15 @@ _GLOBAL(giveup_fpu)
 _GLOBAL(abort)
 	li	r13,0
         mtspr   SPRN_DBCR0,r13		/* disable all debug events */
+	isync
 	mfmsr	r13
 	ori	r13,r13,MSR_DE@l	/* Enable Debug Events */
 	mtmsr	r13
+	isync
         mfspr   r13,SPRN_DBCR0
         lis	r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
         mtspr   SPRN_DBCR0,r13
+	isync
 
 _GLOBAL(set_context)