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@@ -41,6 +41,10 @@
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#include "hw.h"
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+static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
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+ u32 numBits, u32 firstBit,
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+ u32 column);
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+
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/**
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* ath9k_hw_write_regs - ??
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*
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@@ -429,6 +433,67 @@ void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
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/* All code below is for non single-chip solutions */
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+/*
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+ * Fix on 2.4 GHz band for orientation sensitivity issue by increasing
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+ * rf_pwd_icsyndiv.
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+ *
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+ * Theoretical Rules:
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+ * if 2 GHz band
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+ * if forceBiasAuto
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+ * if synth_freq < 2412
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+ * bias = 0
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+ * else if 2412 <= synth_freq <= 2422
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+ * bias = 1
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+ * else // synth_freq > 2422
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+ * bias = 2
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+ * else if forceBias > 0
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+ * bias = forceBias & 7
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+ * else
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+ * no change, use value from ini file
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+ * else
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+ * no change, invalid band
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+ *
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+ * 1st Mod:
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+ * 2422 also uses value of 2
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+ * <approved>
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+ *
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+ * 2nd Mod:
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+ * Less than 2412 uses value of 0, 2412 and above uses value of 2
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+ */
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+static void ath9k_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
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+{
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+ struct ath_common *common = ath9k_hw_common(ah);
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+ u32 tmp_reg;
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+ int reg_writes = 0;
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+ u32 new_bias = 0;
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+
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+ if (!AR_SREV_5416(ah) || synth_freq >= 3000) {
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+ return;
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+ }
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+
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+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
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+
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+ if (synth_freq < 2412)
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+ new_bias = 0;
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+ else if (synth_freq < 2422)
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+ new_bias = 1;
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+ else
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+ new_bias = 2;
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+
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+ /* pre-reverse this field */
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+ tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
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+
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+ ath_print(common, ATH_DBG_CONFIG,
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+ "Force rf_pwd_icsyndiv to %1d on %4d\n",
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+ new_bias, synth_freq);
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+
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+ /* swizzle rf_pwd_icsyndiv */
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+ ath9k_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
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+
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+ /* write Bank 6 with new params */
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+ REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
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+}
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+
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/**
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* ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
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* @ah: atheros hardware stucture
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@@ -499,6 +564,9 @@ int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
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return -EINVAL;
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}
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+ ath9k_hw_force_bias(ah, freq);
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+ ath9k_hw_decrease_chain_power(ah, chan);
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+
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reg32 =
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(channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
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(1 << 5) | 0x1;
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@@ -946,6 +1014,8 @@ ath9k_hw_decrease_chain_power(struct ath_hw *ah, struct ath9k_channel *chan)
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u32 bank6SelMask;
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u32 *bank6Temp = ah->bank6Temp;
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+ BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
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+
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switch (ah->config.diversity_control) {
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case ATH9K_ANT_FIXED_A:
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bank6SelMask =
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