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@@ -1437,8 +1437,8 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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break;
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}
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default:
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- pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
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- "data 0x%llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
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+ "data 0x%llx\n", msr, data);
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return 1;
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}
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return 0;
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@@ -1470,8 +1470,8 @@ static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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case HV_X64_MSR_TPR:
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return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
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default:
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- pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
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- "data 0x%llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
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+ "data 0x%llx\n", msr, data);
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return 1;
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}
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@@ -1551,15 +1551,15 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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data &= ~(u64)0x100; /* ignore ignne emulation enable */
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data &= ~(u64)0x8; /* ignore TLB cache disable */
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if (data != 0) {
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- pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
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- data);
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+ vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
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+ data);
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return 1;
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}
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break;
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case MSR_FAM10H_MMIO_CONF_BASE:
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if (data != 0) {
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- pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
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- "0x%llx\n", data);
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+ vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
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+ "0x%llx\n", data);
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return 1;
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}
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break;
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@@ -1574,8 +1574,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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thus reserved and should throw a #GP */
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return 1;
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}
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- pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
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- __func__, data);
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+ vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
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+ __func__, data);
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break;
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case MSR_IA32_UCODE_REV:
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case MSR_IA32_UCODE_WRITE:
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@@ -1671,8 +1671,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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case MSR_K7_EVNTSEL2:
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case MSR_K7_EVNTSEL3:
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if (data != 0)
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- pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
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- "0x%x data 0x%llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
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+ "0x%x data 0x%llx\n", msr, data);
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break;
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/* at least RHEL 4 unconditionally writes to the perfctr registers,
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* so we ignore writes to make it happy.
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@@ -1681,8 +1681,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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case MSR_K7_PERFCTR1:
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case MSR_K7_PERFCTR2:
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case MSR_K7_PERFCTR3:
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- pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
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- "0x%x data 0x%llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "unimplemented perfctr wrmsr: "
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+ "0x%x data 0x%llx\n", msr, data);
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break;
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case MSR_P6_PERFCTR0:
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case MSR_P6_PERFCTR1:
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@@ -1693,8 +1693,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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return kvm_pmu_set_msr(vcpu, msr, data);
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if (pr || data != 0)
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- pr_unimpl(vcpu, "disabled perfctr wrmsr: "
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- "0x%x data 0x%llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
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+ "0x%x data 0x%llx\n", msr, data);
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break;
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case MSR_K7_CLK_CTL:
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/*
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@@ -1720,7 +1720,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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/* Drop writes to this legacy MSR -- see rdmsr
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* counterpart for further detail.
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*/
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- pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
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+ vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
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break;
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case MSR_AMD64_OSVW_ID_LENGTH:
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if (!guest_cpuid_has_osvw(vcpu))
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@@ -1738,12 +1738,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
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if (kvm_pmu_msr(vcpu, msr))
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return kvm_pmu_set_msr(vcpu, msr, data);
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if (!ignore_msrs) {
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- pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
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- msr, data);
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+ vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
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+ msr, data);
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return 1;
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} else {
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- pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
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- msr, data);
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+ vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
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+ msr, data);
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break;
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}
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}
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@@ -1846,7 +1846,7 @@ static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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data = kvm->arch.hv_hypercall;
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break;
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default:
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- pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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+ vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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return 1;
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}
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@@ -1877,7 +1877,7 @@ static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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data = vcpu->arch.hv_vapic;
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break;
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default:
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- pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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+ vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
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return 1;
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}
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*pdata = data;
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@@ -2030,10 +2030,10 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
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if (kvm_pmu_msr(vcpu, msr))
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return kvm_pmu_get_msr(vcpu, msr, pdata);
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if (!ignore_msrs) {
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- pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
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+ vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
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return 1;
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} else {
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- pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
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+ vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
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data = 0;
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}
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break;
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@@ -4116,7 +4116,7 @@ static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
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value = kvm_get_cr8(vcpu);
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break;
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default:
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- vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
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+ kvm_err("%s: unexpected cr %u\n", __func__, cr);
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return 0;
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}
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@@ -4145,7 +4145,7 @@ static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
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res = kvm_set_cr8(vcpu, val);
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break;
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default:
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- vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
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+ kvm_err("%s: unexpected cr %u\n", __func__, cr);
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res = -1;
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}
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