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@@ -158,41 +158,6 @@ void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
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E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);
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}
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-/**
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- * e1000_mta_set - Set multicast filter table address
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- * @hw: pointer to the HW structure
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- * @hash_value: determines the MTA register and bit to set
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- *
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- * The multicast table address is a register array of 32-bit registers.
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- * The hash_value is used to determine what register the bit is in, the
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- * current value is read, the new bit is OR'd in and the new value is
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- * written back into the register.
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- **/
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-static void e1000_mta_set(struct e1000_hw *hw, u32 hash_value)
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-{
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- u32 hash_bit, hash_reg, mta;
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-
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- /*
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- * The MTA is a register array of 32-bit registers. It is
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- * treated like an array of (32*mta_reg_count) bits. We want to
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- * set bit BitArray[hash_value]. So we figure out what register
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- * the bit is in, read it, OR in the new bit, then write
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- * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
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- * mask to bits 31:5 of the hash value which gives us the
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- * register we're modifying. The hash bit within that register
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- * is determined by the lower 5 bits of the hash value.
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- */
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- hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
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- hash_bit = hash_value & 0x1F;
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-
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- mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
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-
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- mta |= (1 << hash_bit);
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-
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- E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
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- e1e_flush();
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-}
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-
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/**
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* e1000_hash_mc_addr - Generate a multicast hash value
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* @hw: pointer to the HW structure
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@@ -281,8 +246,13 @@ void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
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u8 *mc_addr_list, u32 mc_addr_count,
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u32 rar_used_count, u32 rar_count)
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{
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- u32 hash_value;
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u32 i;
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+ u32 *mcarray = kzalloc(hw->mac.mta_reg_count * sizeof(u32), GFP_ATOMIC);
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+
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+ if (!mcarray) {
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+ printk(KERN_ERR "multicast array memory allocation failed\n");
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+ return;
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+ }
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/*
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* Load the first set of multicast addresses into the exact
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@@ -302,20 +272,24 @@ void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
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}
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}
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- /* Clear the old settings from the MTA */
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- hw_dbg(hw, "Clearing MTA\n");
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- for (i = 0; i < hw->mac.mta_reg_count; i++) {
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- E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
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- e1e_flush();
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- }
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-
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/* Load any remaining multicast addresses into the hash table. */
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for (; mc_addr_count > 0; mc_addr_count--) {
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+ u32 hash_value, hash_reg, hash_bit, mta;
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hash_value = e1000_hash_mc_addr(hw, mc_addr_list);
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hw_dbg(hw, "Hash value = 0x%03X\n", hash_value);
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- e1000_mta_set(hw, hash_value);
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+ hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
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+ hash_bit = hash_value & 0x1F;
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+ mta = (1 << hash_bit);
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+ mcarray[hash_reg] |= mta;
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mc_addr_list += ETH_ALEN;
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}
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+
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+ /* write the hash table completely */
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+ for (i = 0; i < hw->mac.mta_reg_count; i++)
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+ E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, mcarray[i]);
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+
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+ e1e_flush();
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+ kfree(mcarray);
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}
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/**
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