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@@ -79,10 +79,6 @@ static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
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/* Cache is CPU endian */
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/* Cache is CPU endian */
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dest[i - reg] = be16_to_cpu(dest[i - reg]);
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dest[i - reg] = be16_to_cpu(dest[i - reg]);
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- /* Satisfy non-volatile bits from cache */
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- dest[i - reg] &= wm8350_reg_io_map[i].vol;
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- dest[i - reg] |= wm8350->reg_cache[i];
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-
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/* Mask out non-readable bits */
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/* Mask out non-readable bits */
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dest[i - reg] &= wm8350_reg_io_map[i].readable;
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dest[i - reg] &= wm8350_reg_io_map[i].readable;
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}
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}
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@@ -182,9 +178,6 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
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(wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
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(wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
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| src[i - reg];
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| src[i - reg];
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- /* Don't store volatile bits */
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- wm8350->reg_cache[i] &= ~wm8350_reg_io_map[i].vol;
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-
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src[i - reg] = cpu_to_be16(src[i - reg]);
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src[i - reg] = cpu_to_be16(src[i - reg]);
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}
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}
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@@ -1261,7 +1254,6 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
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(i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
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(i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
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value = be16_to_cpu(wm8350->reg_cache[i]);
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value = be16_to_cpu(wm8350->reg_cache[i]);
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value &= wm8350_reg_io_map[i].readable;
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value &= wm8350_reg_io_map[i].readable;
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- value &= ~wm8350_reg_io_map[i].vol;
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wm8350->reg_cache[i] = value;
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wm8350->reg_cache[i] = value;
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} else
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} else
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wm8350->reg_cache[i] = reg_map[i];
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wm8350->reg_cache[i] = reg_map[i];
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