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@@ -22,6 +22,8 @@ urged to choose a smaller block size and learn the scatter-gather technique.
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Mailbox #10 is reserved for DMA transfer information.
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+Note: the hardware expects little-endian data ('intel format').
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+
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Flow
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====
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@@ -64,7 +66,7 @@ addresses are the physical memory location of the target DMA buffer.
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Each S-G array element is a struct of three 32-bit words. The first word is
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the source address, the second is the destination address. Both take up the
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-entire 32 bits. The lowest 16 bits of the third word is the transfer byte
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+entire 32 bits. The lowest 18 bits of the third word is the transfer byte
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count. The high-bit of the third word is the "last" flag. The last-flag tells
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the card to raise the DMA_DONE interrupt. From hard personal experience, if
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you forget to set this bit, the card will still "work" but the stream will
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@@ -78,8 +80,8 @@ Array Element:
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- 32-bit Source Address
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- 32-bit Destination Address
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-- 16-bit reserved (high bit is the last flag)
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-- 16-bit byte count
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+- 14-bit reserved (high bit is the last flag)
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+- 18-bit byte count
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DMA Transfer Status
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===================
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@@ -87,8 +89,8 @@ DMA Transfer Status
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Register 0x0004 holds the DMA Transfer Status:
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Bit
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-4 Scatter-Gather array error
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-3 DMA write error
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-2 DMA read error
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-1 write completed
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0 read completed
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+1 write completed
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+2 DMA read error
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+3 DMA write error
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+4 Scatter-Gather array error
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