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@@ -147,7 +147,7 @@ static void i915_save_vga(struct drm_device *dev)
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i915_write_indexed(cr_index, cr_data, 0x11,
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i915_read_indexed(cr_index, cr_data, 0x11) &
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(~0x80));
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- for (i = 0; i < 0x24; i++)
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+ for (i = 0; i <= 0x24; i++)
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dev_priv->saveCR[i] =
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i915_read_indexed(cr_index, cr_data, i);
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/* Make sure we don't turn off CR group 0 writes */
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@@ -156,7 +156,7 @@ static void i915_save_vga(struct drm_device *dev)
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/* Attribute controller registers */
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inb(st01);
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dev_priv->saveAR_INDEX = inb(VGA_AR_INDEX);
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- for (i = 0; i < 20; i++)
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+ for (i = 0; i <= 0x14; i++)
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dev_priv->saveAR[i] = i915_read_ar(st01, i, 0);
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inb(st01);
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outb(dev_priv->saveAR_INDEX, VGA_AR_INDEX);
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@@ -206,7 +206,7 @@ static void i915_restore_vga(struct drm_device *dev)
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/* CRT controller regs */
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/* Enable CR group 0 writes */
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i915_write_indexed(cr_index, cr_data, 0x11, dev_priv->saveCR[0x11]);
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- for (i = 0; i < 0x24; i++)
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+ for (i = 0; i <= 0x24; i++)
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i915_write_indexed(cr_index, cr_data, i, dev_priv->saveCR[i]);
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/* Graphics controller regs */
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@@ -223,7 +223,7 @@ static void i915_restore_vga(struct drm_device *dev)
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/* Attribute controller registers */
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inb(st01);
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- for (i = 0; i < 20; i++)
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+ for (i = 0; i <= 0x14; i++)
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i915_write_ar(st01, i, dev_priv->saveAR[i], 0);
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inb(st01); /* switch back to index mode */
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outb(dev_priv->saveAR_INDEX | 0x20, VGA_AR_INDEX);
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