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@@ -611,12 +611,17 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci)
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/* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */
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if (!(reg & 0x1))
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- edac_mc_handle_ce(mci, err_addr >> PAGE_SHIFT,
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- err_addr & PAGE_MASK, syndrome, 0, 0,
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- mci->ctl_name);
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+ edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
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+ err_addr >> PAGE_SHIFT,
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+ err_addr & PAGE_MASK, syndrome,
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+ 0, 0, -1,
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+ mci->ctl_name, "", NULL);
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else /* 2 bit error, UE */
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- edac_mc_handle_ue(mci, err_addr >> PAGE_SHIFT,
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- err_addr & PAGE_MASK, 0, mci->ctl_name);
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+ edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
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+ err_addr >> PAGE_SHIFT,
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+ err_addr & PAGE_MASK, 0,
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+ 0, 0, -1,
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+ mci->ctl_name, "", NULL);
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/* clear the error */
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out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
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@@ -695,6 +700,7 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci,
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static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
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{
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struct mem_ctl_info *mci;
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+ struct edac_mc_layer layers[2];
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struct mv64x60_mc_pdata *pdata;
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struct resource *r;
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u32 ctl;
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@@ -703,7 +709,14 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
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if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL))
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return -ENOMEM;
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- mci = edac_mc_alloc(sizeof(struct mv64x60_mc_pdata), 1, 1, edac_mc_idx);
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+ layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
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+ layers[0].size = 1;
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+ layers[0].is_virt_csrow = true;
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+ layers[1].type = EDAC_MC_LAYER_CHANNEL;
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+ layers[1].size = 1;
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+ layers[1].is_virt_csrow = false;
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+ mci = new_edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,
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+ sizeof(struct mv64x60_mc_pdata));
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if (!mci) {
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printk(KERN_ERR "%s: No memory for CPU err\n", __func__);
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devres_release_group(&pdev->dev, mv64x60_mc_err_probe);
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