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@@ -65,13 +65,11 @@ void highbank_set_cpu_jump(int cpu, void *jump_addr)
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HB_JUMP_TABLE_PHYS(cpu) + 15);
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}
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-#ifdef CONFIG_CACHE_L2X0
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static void highbank_l2x0_disable(void)
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{
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/* Disable PL310 L2 Cache controller */
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highbank_smc1(0x102, 0x0);
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}
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-#endif
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static void __init highbank_init_irq(void)
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{
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@@ -80,12 +78,13 @@ static void __init highbank_init_irq(void)
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if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
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highbank_scu_map_io();
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-#ifdef CONFIG_CACHE_L2X0
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/* Enable PL310 L2 Cache controller */
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- highbank_smc1(0x102, 0x1);
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- l2x0_of_init(0, ~0UL);
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- outer_cache.disable = highbank_l2x0_disable;
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-#endif
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+ if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
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+ of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
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+ highbank_smc1(0x102, 0x1);
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+ l2x0_of_init(0, ~0UL);
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+ outer_cache.disable = highbank_l2x0_disable;
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+ }
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}
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static void __init highbank_timer_init(void)
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