|
@@ -341,7 +341,7 @@ enum {
|
|
|
PAS_IOB_DMA_TXCH_STAT_CNTDEL_M)
|
|
|
#define PAS_IOB_DMA_RXCH_RESET(i) (0x1500 + (i)*4)
|
|
|
#define PAS_IOB_DMA_RXCH_RESET_PCNT_M 0xffff0000
|
|
|
-#define PAS_IOB_DMA_RXCH_RESET_PCNT_S 0
|
|
|
+#define PAS_IOB_DMA_RXCH_RESET_PCNT_S 16
|
|
|
#define PAS_IOB_DMA_RXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \
|
|
|
PAS_IOB_DMA_RXCH_RESET_PCNT_M)
|
|
|
#define PAS_IOB_DMA_RXCH_RESET_PCNTRST 0x00000020
|
|
@@ -352,7 +352,7 @@ enum {
|
|
|
#define PAS_IOB_DMA_RXCH_RESET_PINTC 0x00000001
|
|
|
#define PAS_IOB_DMA_TXCH_RESET(i) (0x1600 + (i)*4)
|
|
|
#define PAS_IOB_DMA_TXCH_RESET_PCNT_M 0xffff0000
|
|
|
-#define PAS_IOB_DMA_TXCH_RESET_PCNT_S 0
|
|
|
+#define PAS_IOB_DMA_TXCH_RESET_PCNT_S 16
|
|
|
#define PAS_IOB_DMA_TXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \
|
|
|
PAS_IOB_DMA_TXCH_RESET_PCNT_M)
|
|
|
#define PAS_IOB_DMA_TXCH_RESET_PCNTRST 0x00000020
|