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@@ -378,6 +378,7 @@ struct vcpu_vmx {
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struct shared_msr_entry *guest_msrs;
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int nmsrs;
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int save_nmsrs;
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+ unsigned long host_idt_base;
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#ifdef CONFIG_X86_64
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u64 msr_host_kernel_gs_base;
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u64 msr_guest_kernel_gs_base;
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@@ -2627,7 +2628,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
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#ifdef CONFIG_X86_64
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min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
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#endif
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- opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT;
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+ opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT |
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+ VM_EXIT_ACK_INTR_ON_EXIT;
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if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
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&_vmexit_control) < 0)
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return -EIO;
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@@ -3879,7 +3881,7 @@ static void vmx_disable_intercept_msr_write_x2apic(u32 msr)
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* Note that host-state that does change is set elsewhere. E.g., host-state
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* that is set differently for each CPU is set in vmx_vcpu_load(), not here.
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*/
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-static void vmx_set_constant_host_state(void)
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+static void vmx_set_constant_host_state(struct vcpu_vmx *vmx)
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{
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u32 low32, high32;
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unsigned long tmpl;
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@@ -3907,6 +3909,7 @@ static void vmx_set_constant_host_state(void)
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native_store_idt(&dt);
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vmcs_writel(HOST_IDTR_BASE, dt.address); /* 22.2.4 */
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+ vmx->host_idt_base = dt.address;
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vmcs_writel(HOST_RIP, vmx_return); /* 22.2.5 */
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@@ -4039,7 +4042,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
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vmcs_write16(HOST_FS_SELECTOR, 0); /* 22.2.4 */
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vmcs_write16(HOST_GS_SELECTOR, 0); /* 22.2.4 */
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- vmx_set_constant_host_state();
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+ vmx_set_constant_host_state(vmx);
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#ifdef CONFIG_X86_64
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rdmsrl(MSR_FS_BASE, a);
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vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
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@@ -6399,6 +6402,52 @@ static void vmx_complete_atomic_exit(struct vcpu_vmx *vmx)
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}
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}
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+static void vmx_handle_external_intr(struct kvm_vcpu *vcpu)
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+{
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+ u32 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
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+
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+ /*
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+ * If external interrupt exists, IF bit is set in rflags/eflags on the
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+ * interrupt stack frame, and interrupt will be enabled on a return
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+ * from interrupt handler.
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+ */
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+ if ((exit_intr_info & (INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK))
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+ == (INTR_INFO_VALID_MASK | INTR_TYPE_EXT_INTR)) {
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+ unsigned int vector;
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+ unsigned long entry;
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+ gate_desc *desc;
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+ struct vcpu_vmx *vmx = to_vmx(vcpu);
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+#ifdef CONFIG_X86_64
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+ unsigned long tmp;
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+#endif
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+
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+ vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
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+ desc = (gate_desc *)vmx->host_idt_base + vector;
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+ entry = gate_offset(*desc);
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+ asm volatile(
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+#ifdef CONFIG_X86_64
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+ "mov %%" _ASM_SP ", %[sp]\n\t"
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+ "and $0xfffffffffffffff0, %%" _ASM_SP "\n\t"
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+ "push $%c[ss]\n\t"
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+ "push %[sp]\n\t"
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+#endif
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+ "pushf\n\t"
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+ "orl $0x200, (%%" _ASM_SP ")\n\t"
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+ __ASM_SIZE(push) " $%c[cs]\n\t"
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+ "call *%[entry]\n\t"
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+ :
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+#ifdef CONFIG_X86_64
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+ [sp]"=&r"(tmp)
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+#endif
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+ :
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+ [entry]"r"(entry),
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+ [ss]"i"(__KERNEL_DS),
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+ [cs]"i"(__KERNEL_CS)
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+ );
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+ } else
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+ local_irq_enable();
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+}
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+
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static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
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{
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u32 exit_intr_info;
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@@ -7041,7 +7090,7 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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* Other fields are different per CPU, and will be set later when
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* vmx_vcpu_load() is called, and when vmx_save_host_state() is called.
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*/
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- vmx_set_constant_host_state();
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+ vmx_set_constant_host_state(vmx);
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/*
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* HOST_RSP is normally set correctly in vmx_vcpu_run() just before
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@@ -7718,6 +7767,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
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.set_tdp_cr3 = vmx_set_cr3,
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.check_intercept = vmx_check_intercept,
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+ .handle_external_intr = vmx_handle_external_intr,
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};
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static int __init vmx_init(void)
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