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@@ -120,6 +120,7 @@ struct ivmd_header {
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bool amd_iommu_dump;
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bool amd_iommu_dump;
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static int __initdata amd_iommu_detected;
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static int __initdata amd_iommu_detected;
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+static bool __initdata amd_iommu_disabled;
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u16 amd_iommu_last_bdf; /* largest PCI device id we have
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u16 amd_iommu_last_bdf; /* largest PCI device id we have
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to handle */
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to handle */
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@@ -1372,6 +1373,9 @@ void __init amd_iommu_detect(void)
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if (no_iommu || (iommu_detected && !gart_iommu_aperture))
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if (no_iommu || (iommu_detected && !gart_iommu_aperture))
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return;
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return;
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+ if (amd_iommu_disabled)
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+ return;
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+
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if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
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if (acpi_table_parse("IVRS", early_amd_iommu_detect) == 0) {
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iommu_detected = 1;
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iommu_detected = 1;
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amd_iommu_detected = 1;
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amd_iommu_detected = 1;
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@@ -1401,6 +1405,8 @@ static int __init parse_amd_iommu_options(char *str)
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for (; *str; ++str) {
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for (; *str; ++str) {
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if (strncmp(str, "fullflush", 9) == 0)
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if (strncmp(str, "fullflush", 9) == 0)
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amd_iommu_unmap_flush = true;
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amd_iommu_unmap_flush = true;
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+ if (strncmp(str, "off", 3) == 0)
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+ amd_iommu_disabled = true;
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}
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}
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return 1;
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return 1;
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