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@@ -178,6 +178,26 @@ static void b43_phy_ht_force_rf_sequence(struct b43_wldev *dev, u16 rf_seq)
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b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);
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}
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+static void b43_phy_ht_pa_override(struct b43_wldev *dev, bool enable)
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+{
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+ struct b43_phy_ht *htphy = dev->phy.ht;
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+ static const u16 regs[3] = { B43_PHY_HT_RF_CTL_INT_C1,
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+ B43_PHY_HT_RF_CTL_INT_C2,
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+ B43_PHY_HT_RF_CTL_INT_C3 };
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+ int i;
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+
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+ if (enable) {
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+ for (i = 0; i < 3; i++)
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+ b43_phy_write(dev, regs[i], htphy->rf_ctl_int_save[i]);
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+ } else {
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+ for (i = 0; i < 3; i++)
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+ htphy->rf_ctl_int_save[i] = b43_phy_read(dev, regs[i]);
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+ /* TODO: Does 5GHz band use different value (not 0x0400)? */
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+ for (i = 0; i < 3; i++)
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+ b43_phy_write(dev, regs[i], 0x0400);
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+ }
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+}
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+
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/**************************************************
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* Various PHY ops
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**************************************************/
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@@ -554,8 +574,10 @@ static int b43_phy_ht_op_init(struct b43_wldev *dev)
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b43_mac_phy_clock_set(dev, true);
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+ b43_phy_ht_pa_override(dev, false);
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b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RX2TX);
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b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RST2RX);
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+ b43_phy_ht_pa_override(dev, true);
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/* TODO: Should we restore it? Or store it in global PHY info? */
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b43_phy_ht_classifier(dev, 0, 0);
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