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@@ -975,6 +975,23 @@ static int wl18xx_plt_init(struct wl1271 *wl)
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return wl->ops->boot(wl);
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}
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+static void wl18xx_get_mac(struct wl1271 *wl)
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+{
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+ u32 mac1, mac2;
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+
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+ wlcore_set_partition(wl, &wl->ptable[PART_TOP_PRCM_ELP_SOC]);
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+
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+ mac1 = wl1271_read32(wl, WL18XX_REG_FUSE_BD_ADDR_1);
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+ mac2 = wl1271_read32(wl, WL18XX_REG_FUSE_BD_ADDR_2);
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+
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+ /* these are the two parts of the BD_ADDR */
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+ wl->fuse_oui_addr = ((mac2 & 0xffff) << 8) +
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+ ((mac1 & 0xff000000) >> 24);
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+ wl->fuse_nic_addr = (mac1 & 0xffffff);
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+
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+ wlcore_set_partition(wl, &wl->ptable[PART_DOWN]);
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+}
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+
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static struct wlcore_ops wl18xx_ops = {
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.identify_chip = wl18xx_identify_chip,
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.boot = wl18xx_boot,
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@@ -994,6 +1011,7 @@ static struct wlcore_ops wl18xx_ops = {
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.set_rx_csum = wl18xx_set_rx_csum,
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.sta_get_ap_rate_mask = wl18xx_sta_get_ap_rate_mask,
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.ap_get_mimo_wide_rate_mask = wl18xx_ap_get_mimo_wide_rate_mask,
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+ .get_mac = wl18xx_get_mac,
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};
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/* HT cap appropriate for wide channels */
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