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@@ -1565,31 +1565,31 @@ static void sci_enable_ms(struct uart_port *port)
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static void sci_break_ctl(struct uart_port *port, int break_state)
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{
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struct sci_port *s = to_sci_port(port);
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+ struct plat_sci_reg *reg = sci_regmap[s->cfg->regtype] + SCSPTR;
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unsigned short scscr, scsptr;
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- switch (s->cfg->regtype) {
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- case SCIx_SH4_SCIF_REGTYPE:
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- scsptr = serial_port_in(port, SCSPTR);
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- scscr = serial_port_in(port, SCSCR);
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-
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- if (break_state == -1) {
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- scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
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- scscr &= ~SCSCR_TE;
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- } else {
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- scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
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- scscr |= SCSCR_TE;
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- }
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-
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- serial_port_out(port, SCSPTR, scsptr);
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- serial_port_out(port, SCSCR, scscr);
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- break;
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- default:
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+ /* check wheter the port has SCSPTR */
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+ if (!reg->size) {
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/*
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* Not supported by hardware. Most parts couple break and rx
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* interrupts together, with break detection always enabled.
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*/
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- break;
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+ return;
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}
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+
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+ scsptr = serial_port_in(port, SCSPTR);
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+ scscr = serial_port_in(port, SCSCR);
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+
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+ if (break_state == -1) {
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+ scsptr = (scsptr | SCSPTR_SPB2IO) & ~SCSPTR_SPB2DT;
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+ scscr &= ~SCSCR_TE;
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+ } else {
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+ scsptr = (scsptr | SCSPTR_SPB2DT) & ~SCSPTR_SPB2IO;
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+ scscr |= SCSCR_TE;
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+ }
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+
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+ serial_port_out(port, SCSPTR, scsptr);
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+ serial_port_out(port, SCSCR, scscr);
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}
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#ifdef CONFIG_SERIAL_SH_SCI_DMA
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