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@@ -29,6 +29,7 @@
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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+#include <linux/fs.h>
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#include <asm/mmu_context.h>
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@@ -51,6 +52,27 @@ static void flush_data_cache_page(unsigned long addr)
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}
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}
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+void flush_dcache_page(struct page *page)
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+{
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+ struct address_space *mapping = page_mapping(page);
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+ unsigned long addr;
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+
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+ if (PageHighMem(page))
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+ return;
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+ if (mapping && !mapping_mapped(mapping)) {
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+ set_bit(PG_dcache_dirty, &(page)->flags);
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+ return;
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+ }
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+
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+ /*
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+ * We could delay the flush for the !page_mapping case too. But that
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+ * case is for exec env/arg pages and those are %99 certainly going to
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+ * get faulted into the tlb (and thus flushed) anyways.
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+ */
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+ addr = (unsigned long) page_address(page);
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+ flush_data_cache_page(addr);
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+}
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+
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/* called by update_mmu_cache. */
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void __update_cache(struct vm_area_struct *vma, unsigned long address,
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pte_t pte)
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@@ -63,11 +85,11 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address,
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if (unlikely(!pfn_valid(pfn)))
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return;
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page = pfn_to_page(pfn);
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- if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) {
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+ if (page_mapping(page) && test_bit(PG_dcache_dirty, &(page)->flags)) {
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addr = (unsigned long) page_address(page);
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if (exec)
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flush_data_cache_page(addr);
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- clear_bit(PG_arch_1, &page->flags);
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+ clear_bit(PG_dcache_dirty, &(page)->flags);
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}
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}
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