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@@ -844,13 +844,13 @@ static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
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static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
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struct modal_eep_4k_header *pModal,
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struct ar5416_eeprom_4k *eep,
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- u8 txRxAttenLocal, int regChainOffset)
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+ u8 txRxAttenLocal)
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{
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- REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0 + regChainOffset,
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+ REG_WRITE(ah, AR_PHY_SWITCH_CHAIN_0,
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pModal->antCtrlChain[0]);
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- REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset,
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- (REG_READ(ah, AR_PHY_TIMING_CTRL4(0) + regChainOffset) &
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+ REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0),
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+ (REG_READ(ah, AR_PHY_TIMING_CTRL4(0)) &
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~(AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF |
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AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF)) |
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SM(pModal->iqCalICh[0], AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF) |
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@@ -860,14 +860,14 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
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AR5416_EEP_MINOR_VER_3) {
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txRxAttenLocal = pModal->txRxAttenCh[0];
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- REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
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AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, pModal->bswMargin[0]);
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- REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
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AR_PHY_GAIN_2GHZ_XATTEN1_DB, pModal->bswAtten[0]);
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- REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
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AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN,
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pModal->xatten2Margin[0]);
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- REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ,
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AR_PHY_GAIN_2GHZ_XATTEN2_DB, pModal->xatten2Db[0]);
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/* Set the block 1 value to block 0 value */
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@@ -884,9 +884,9 @@ static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
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pModal->xatten2Db[0]);
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}
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- REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
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AR9280_PHY_RXGAIN_TXRX_ATTEN, txRxAttenLocal);
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- REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset,
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+ REG_RMW_FIELD(ah, AR_PHY_RXGAIN,
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AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[0]);
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REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000,
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@@ -919,7 +919,7 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
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ah->eep_ops->get_eeprom_antenna_cfg(ah, chan));
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/* Single chain for 4K EEPROM*/
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- ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal, 0);
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+ ath9k_hw_4k_set_gain(ah, pModal, eep, txRxAttenLocal);
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/* Initialize Ant Diversity settings from EEPROM */
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if (pModal->version >= 3) {
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