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@@ -378,6 +378,8 @@ static struct sh_eth_cpu_data r8a777x_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_r8a777x,
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+ .register_type = SH_ETH_REG_FAST_RCAR,
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+
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.ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
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.ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
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.eesipr_value = 0x01ff009f,
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@@ -398,6 +400,8 @@ static struct sh_eth_cpu_data r8a7790_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_r8a777x,
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+ .register_type = SH_ETH_REG_FAST_RCAR,
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+
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.ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
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.ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
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.eesipr_value = 0x01ff009f,
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@@ -435,6 +439,8 @@ static struct sh_eth_cpu_data sh7724_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_sh7724,
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+ .register_type = SH_ETH_REG_FAST_SH4,
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+
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.ecsr_value = ECSR_PSRTO | ECSR_LCHNG | ECSR_ICD,
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.ecsipr_value = ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | ECSIPR_ICDIP,
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.eesipr_value = 0x01ff009f,
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@@ -473,6 +479,8 @@ static struct sh_eth_cpu_data sh7757_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_sh7757,
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+ .register_type = SH_ETH_REG_FAST_SH4,
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+
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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.rmcr_value = 0x00000001,
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@@ -541,6 +549,8 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_giga,
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+ .register_type = SH_ETH_REG_GIGABIT,
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+
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.ecsr_value = ECSR_ICD | ECSR_MPD,
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.ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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@@ -599,6 +609,8 @@ static struct sh_eth_cpu_data sh7734_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_gether,
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+ .register_type = SH_ETH_REG_GIGABIT,
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+
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.ecsr_value = ECSR_ICD | ECSR_MPD,
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.ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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@@ -626,6 +638,8 @@ static struct sh_eth_cpu_data sh7763_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_gether,
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+ .register_type = SH_ETH_REG_GIGABIT,
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+
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.ecsr_value = ECSR_ICD | ECSR_MPD,
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.ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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@@ -663,6 +677,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
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.set_duplex = sh_eth_set_duplex,
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.set_rate = sh_eth_set_rate_gether,
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+ .register_type = SH_ETH_REG_GIGABIT,
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+
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.ecsr_value = ECSR_ICD | ECSR_MPD,
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.ecsipr_value = ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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@@ -685,6 +701,8 @@ static struct sh_eth_cpu_data r8a7740_data = {
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};
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static struct sh_eth_cpu_data sh7619_data = {
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+ .register_type = SH_ETH_REG_FAST_SH3_SH2,
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+
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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.apr = 1,
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@@ -694,6 +712,8 @@ static struct sh_eth_cpu_data sh7619_data = {
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};
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static struct sh_eth_cpu_data sh771x_data = {
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+ .register_type = SH_ETH_REG_FAST_SH3_SH2,
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+
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.eesipr_value = DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,
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.tsu = 1,
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};
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@@ -2643,10 +2663,10 @@ static int sh_eth_drv_probe(struct platform_device *pdev)
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mdp->edmac_endian = pd->edmac_endian;
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mdp->no_ether_link = pd->no_ether_link;
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mdp->ether_link_active_low = pd->ether_link_active_low;
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- mdp->reg_offset = sh_eth_get_register_offset(pd->register_type);
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/* set cpu data */
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mdp->cd = (struct sh_eth_cpu_data *)id->driver_data;
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+ mdp->reg_offset = sh_eth_get_register_offset(mdp->cd->register_type);
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sh_eth_set_default_cpu_data(mdp->cd);
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/* set function */
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