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@@ -37,30 +37,35 @@
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <0>;
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+ cci-control-port = <&cci_control1>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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+ cci-control-port = <&cci_control1>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x100>;
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+ cci-control-port = <&cci_control2>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x101>;
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+ cci-control-port = <&cci_control2>;
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};
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cpu4: cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x102>;
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+ cci-control-port = <&cci_control2>;
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};
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};
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@@ -104,6 +109,26 @@
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interrupts = <1 9 0xf04>;
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};
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+ cci@2c090000 {
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+ compatible = "arm,cci-400";
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ reg = <0 0x2c090000 0 0x1000>;
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+ ranges = <0x0 0x0 0x2c090000 0x10000>;
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+
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+ cci_control1: slave-if@4000 {
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+ compatible = "arm,cci-400-ctrl-if";
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+ interface-type = "ace";
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+ reg = <0x4000 0x1000>;
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+ };
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+
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+ cci_control2: slave-if@5000 {
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+ compatible = "arm,cci-400-ctrl-if";
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+ interface-type = "ace";
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+ reg = <0x5000 0x1000>;
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+ };
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+ };
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+
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memory-controller@7ffd0000 {
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compatible = "arm,pl354", "arm,primecell";
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reg = <0 0x7ffd0000 0 0x1000>;
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