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@@ -617,19 +617,23 @@ u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
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struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
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if ((!iwl_ht_conf->is_ht) ||
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- (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
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- (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
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+ (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
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return 0;
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+ /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
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+ * the bit will not set if it is pure 40MHz case
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+ */
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if (sta_ht_inf) {
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- if ((!sta_ht_inf->ht_supported) ||
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- (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
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+ if (!sta_ht_inf->ht_supported)
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return 0;
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}
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- return iwl_is_channel_extension(priv, priv->band,
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- le16_to_cpu(priv->staging_rxon.channel),
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- iwl_ht_conf->extension_chan_offset);
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+ if (iwl_ht_conf->ht_protection & IEEE80211_HT_OP_MODE_PROTECTION_20MHZ)
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+ return 1;
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+ else
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+ return iwl_is_channel_extension(priv, priv->band,
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+ le16_to_cpu(priv->staging_rxon.channel),
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+ iwl_ht_conf->extension_chan_offset);
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}
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EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
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@@ -799,42 +803,51 @@ EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
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void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
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{
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struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
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- u32 val;
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if (!ht_info->is_ht) {
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- rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
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- RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
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+ rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
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RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
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RXON_FLG_FAT_PROT_MSK |
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RXON_FLG_HT_PROT_MSK);
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return;
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}
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- /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
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- if (iwl_is_fat_tx_allowed(priv, NULL))
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- rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
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- else
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- rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
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- RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
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-
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- /* Note: control channel is opposite of extension channel */
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- switch (ht_info->extension_chan_offset) {
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- case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
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- rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
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- break;
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- case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
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- rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
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- break;
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- case IEEE80211_HT_PARAM_CHA_SEC_NONE:
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- default:
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- rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
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- break;
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+ /* FIXME: if the definition of ht_protection changed, the "translation"
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+ * will be needed for rxon->flags
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+ */
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+ rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
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+
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+ /* Set up channel bandwidth:
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+ * 20 MHz only, 20/40 mixed or pure 40 if fat ok */
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+ /* clear the HT channel mode before set the mode */
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+ rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
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+ RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
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+ if (iwl_is_fat_tx_allowed(priv, NULL)) {
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+ /* pure 40 fat */
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+ if (rxon->flags & RXON_FLG_FAT_PROT_MSK)
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
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+ else {
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+ /* Note: control channel is opposite of extension channel */
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+ switch (ht_info->extension_chan_offset) {
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+ case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
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+ rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
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+ break;
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+ case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
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+ rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
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+ break;
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+ case IEEE80211_HT_PARAM_CHA_SEC_NONE:
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+ default:
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+ /* channel location only valid if in Mixed mode */
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+ IWL_ERR(priv, "invalid extension channel offset\n");
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+ break;
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+ }
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+ }
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+ } else {
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+ rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
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}
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- val = ht_info->ht_protection;
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-
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- rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
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-
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if (priv->cfg->ops->hcmd->set_rxon_chain)
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priv->cfg->ops->hcmd->set_rxon_chain(priv);
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@@ -1122,8 +1135,9 @@ void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
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priv->staging_rxon.cck_basic_rates =
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(IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
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- priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
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- RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
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+ /* clear both MIX and PURE40 mode flag */
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+ priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
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+ RXON_FLG_CHANNEL_MODE_PURE_40);
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memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
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memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
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priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
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