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@@ -170,9 +170,16 @@ not_angel:
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.text
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adr r0, LC0
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- ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
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- THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} )
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+ ARM( ldmia r0, {r1, r2, r3, r5, r6, r11, ip, sp})
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+ THUMB( ldmia r0, {r1, r2, r3, r5, r6, r11, ip} )
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THUMB( ldr sp, [r0, #32] )
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+#ifdef CONFIG_AUTO_ZRELADDR
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+ @ determine final kernel image address
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+ and r4, pc, #0xf8000000
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+ add r4, r4, #TEXT_OFFSET
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+#else
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+ ldr r4, =CONFIG_ZRELADDR
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+#endif
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subs r0, r0, r1 @ calculate the delta offset
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@ if delta is zero, we are
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@@ -310,18 +317,17 @@ wont_overwrite: mov r0, r4
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LC0: .word LC0 @ r1
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.word __bss_start @ r2
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.word _end @ r3
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- .word zreladdr @ r4
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.word _start @ r5
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.word _image_size @ r6
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.word _got_start @ r11
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.word _got_end @ ip
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- .word user_stack+4096 @ sp
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+ .word user_stack_end @ sp
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LC1: .word reloc_end - reloc_start
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.size LC0, . - LC0
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#ifdef CONFIG_ARCH_RPC
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.globl params
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-params: ldr r0, =params_phys
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+params: ldr r0, =0x10000100 @ params_phys for RPC
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mov pc, lr
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.ltorg
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.align
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@@ -339,9 +345,8 @@ params: ldr r0, =params_phys
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* r4 = kernel execution address
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* r7 = architecture number
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* r8 = atags pointer
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- * r9 = run-time address of "start" (???)
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* On exit,
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- * r1, r2, r3, r9, r10, r12 corrupted
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+ * r0, r1, r2, r3, r9, r10, r12 corrupted
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* This routine must preserve:
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* r4, r5, r6, r7, r8
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*/
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@@ -396,12 +401,18 @@ __armv3_mpu_cache_on:
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mov r0, #0
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mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
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+ /*
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+ * ?? ARMv3 MMU does not allow reading the control register,
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+ * does this really work on ARMv3 MPU?
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+ */
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mrc p15, 0, r0, c1, c0, 0 @ read control reg
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@ .... .... .... WC.M
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orr r0, r0, #0x000d @ .... .... .... 11.1
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+ /* ?? this overwrites the value constructed above? */
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mov r0, #0
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mcr p15, 0, r0, c1, c0, 0 @ write control reg
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+ /* ?? invalidate for the second time? */
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mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
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mov pc, lr
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@@ -771,8 +782,10 @@ proc_types:
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* Turn off the Cache and MMU. ARMv3 does not support
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* reading the control register, but ARMv4 does.
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*
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- * On exit, r0, r1, r2, r3, r9, r12 corrupted
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- * This routine must preserve: r4, r6, r7
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+ * On exit,
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+ * r0, r1, r2, r3, r9, r12 corrupted
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+ * This routine must preserve:
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+ * r4, r6, r7
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*/
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.align 5
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cache_off: mov r3, #12 @ cache_off function
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@@ -845,7 +858,7 @@ __armv3_mmu_cache_off:
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* Clean and flush the cache to maintain consistency.
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*
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* On exit,
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- * r1, r2, r3, r9, r11, r12 corrupted
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+ * r1, r2, r3, r9, r10, r11, r12 corrupted
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* This routine must preserve:
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* r0, r4, r5, r6, r7
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*/
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@@ -988,7 +1001,7 @@ no_cache_id:
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__armv3_mmu_cache_flush:
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__armv3_mpu_cache_flush:
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mov r1, #0
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- mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
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+ mcr p15, 0, r1, c7, c0, 0 @ invalidate whole cache v3
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mov pc, lr
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/*
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@@ -1001,6 +1014,7 @@ __armv3_mpu_cache_flush:
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phexbuf: .space 12
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.size phexbuf, . - phexbuf
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+@ phex corrupts {r0, r1, r2, r3}
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phex: adr r3, phexbuf
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mov r2, #0
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strb r2, [r3, r1]
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@@ -1015,6 +1029,7 @@ phex: adr r3, phexbuf
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strb r2, [r3, r1]
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b 1b
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+@ puts corrupts {r0, r1, r2, r3}
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puts: loadsp r3, r1
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1: ldrb r2, [r0], #1
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teq r2, #0
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@@ -1029,12 +1044,14 @@ puts: loadsp r3, r1
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teq r0, #0
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bne 1b
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mov pc, lr
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+@ putc corrupts {r0, r1, r2, r3}
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putc:
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mov r2, r0
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mov r0, #0
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loadsp r3, r1
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b 2b
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+@ memdump corrupts {r0, r1, r2, r3, r10, r11, r12, lr}
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memdump: mov r12, r0
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mov r10, lr
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mov r11, #0
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@@ -1070,3 +1087,4 @@ reloc_end:
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.align
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.section ".stack", "w"
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user_stack: .space 4096
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+user_stack_end:
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