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@@ -480,19 +480,27 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
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int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS);
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u32 buses, i, j = 0;
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u16 bctl;
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+ int broken = 0;
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pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses);
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dev_dbg(&dev->dev, "scanning behind bridge, config %06x, pass %d\n",
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buses & 0xffffff, pass);
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+ /* Check if setup is sensible at all */
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+ if (!pass &&
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+ ((buses & 0xff) != bus->number || ((buses >> 8) & 0xff) <= bus->number)) {
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+ dev_dbg(&dev->dev, "bus configuration invalid, reconfiguring\n");
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+ broken = 1;
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+ }
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+
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/* Disable MasterAbortMode during probing to avoid reporting
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of bus errors (in some architectures) */
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pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &bctl);
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pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
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bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
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- if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus) {
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+ if ((buses & 0xffff00) && !pcibios_assign_all_busses() && !is_cardbus && !broken) {
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unsigned int cmax, busnr;
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/*
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* Bus already configured by firmware, process it in the first
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@@ -530,7 +538,7 @@ int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
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* do in the second pass.
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*/
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if (!pass) {
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- if (pcibios_assign_all_busses())
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+ if (pcibios_assign_all_busses() || broken)
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/* Temporarily disable forwarding of the
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configuration cycles on all bridges in
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this bus segment to avoid possible
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