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@@ -521,6 +521,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
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/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
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if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
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adjusted_clock = mode->clock * 2;
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+ if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
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+ pll->algo = PLL_ALGO_LEGACY;
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+ pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;
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+ }
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} else {
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if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
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pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
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