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@@ -1,6 +1,124 @@
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#ifndef _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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-#include <asm-generic/futex.h>
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+#include <linux/futex.h>
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+#include <asm/errno.h>
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+#include <asm/system.h>
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+#include <asm/uaccess.h>
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-#endif
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+#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
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+do { \
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+ register unsigned long r8 __asm ("r8") = 0; \
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+ __asm__ __volatile__( \
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+ " mf;; \n" \
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+ "[1:] " insn ";; \n" \
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+ " .xdata4 \"__ex_table\", 1b-., 2f-. \n" \
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+ "[2:]" \
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+ : "+r" (r8), "=r" (oldval) \
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+ : "r" (uaddr), "r" (oparg) \
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+ : "memory"); \
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+ ret = r8; \
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+} while (0)
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+
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+#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
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+do { \
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+ register unsigned long r8 __asm ("r8") = 0; \
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+ int val, newval; \
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+ do { \
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+ __asm__ __volatile__( \
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+ " mf;; \n" \
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+ "[1:] ld4 %3=[%4];; \n" \
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+ " mov %2=%3 \n" \
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+ insn ";; \n" \
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+ " mov ar.ccv=%2;; \n" \
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+ "[2:] cmpxchg4.acq %1=[%4],%3,ar.ccv;; \n" \
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+ " .xdata4 \"__ex_table\", 1b-., 3f-.\n" \
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+ " .xdata4 \"__ex_table\", 2b-., 3f-.\n" \
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+ "[3:]" \
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+ : "+r" (r8), "=r" (val), "=&r" (oldval), \
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+ "=&r" (newval) \
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+ : "r" (uaddr), "r" (oparg) \
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+ : "memory"); \
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+ if (unlikely (r8)) \
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+ break; \
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+ } while (unlikely (val != oldval)); \
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+ ret = r8; \
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+} while (0)
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+
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+static inline int
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+futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
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+{
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+ int op = (encoded_op >> 28) & 7;
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+ int cmp = (encoded_op >> 24) & 15;
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+ int oparg = (encoded_op << 8) >> 20;
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+ int cmparg = (encoded_op << 20) >> 20;
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+ int oldval = 0, ret;
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+ if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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+ oparg = 1 << oparg;
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+
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+ if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
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+ return -EFAULT;
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+
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+ inc_preempt_count();
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+
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+ switch (op) {
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+ case FUTEX_OP_SET:
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+ __futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr,
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+ oparg);
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+ break;
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+ case FUTEX_OP_ADD:
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+ __futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg);
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+ break;
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+ case FUTEX_OP_OR:
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+ __futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg);
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+ break;
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+ case FUTEX_OP_ANDN:
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+ __futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr,
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+ ~oparg);
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+ break;
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+ case FUTEX_OP_XOR:
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+ __futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg);
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+ break;
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+ default:
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+ ret = -ENOSYS;
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+ }
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+
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+ dec_preempt_count();
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+
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+ if (!ret) {
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+ switch (cmp) {
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+ case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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+ case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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+ case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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+ case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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+ case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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+ case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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+ default: ret = -ENOSYS;
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+ }
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+ }
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+ return ret;
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+}
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+
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+static inline int
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+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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+{
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+ if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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+ return -EFAULT;
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+
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+ {
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+ register unsigned long r8 __asm ("r8");
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+ __asm__ __volatile__(
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+ " mf;; \n"
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+ " mov ar.ccv=%3;; \n"
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+ "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
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+ " .xdata4 \"__ex_table\", 1b-., 2f-. \n"
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+ "[2:]"
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+ : "=r" (r8)
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+ : "r" (uaddr), "r" (newval),
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+ "rO" ((long) (unsigned) oldval)
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+ : "memory");
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+ return r8;
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+ }
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+}
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+
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+#endif /* _ASM_FUTEX_H */
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