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@@ -10,6 +10,7 @@
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* published by the Free Software Foundation.
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*/
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+#include <linux/delay.h>
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#include <linux/gcd.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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@@ -65,6 +66,163 @@
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#define arizona_aif_dbg(_dai, fmt, ...) \
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dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
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+static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
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+ struct snd_kcontrol *kcontrol,
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+ int event)
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+{
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+ struct snd_soc_codec *codec = w->codec;
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+ struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
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+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
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+ bool manual_ena = false;
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+ int val;
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+
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+ switch (arizona->type) {
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+ case WM5102:
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+ switch (arizona->rev) {
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+ case 0:
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+ break;
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+ default:
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+ manual_ena = true;
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+ break;
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+ }
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+ default:
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+ break;
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+ }
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+
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+ switch (event) {
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+ case SND_SOC_DAPM_PRE_PMU:
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+ if (!priv->spk_ena && manual_ena) {
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+ snd_soc_write(codec, 0x4f5, 0x25a);
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+ priv->spk_ena_pending = true;
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+ }
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+ break;
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+ case SND_SOC_DAPM_POST_PMU:
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+ val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
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+ if (val & ARIZONA_SPK_SHUTDOWN_STS) {
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+ dev_crit(arizona->dev,
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+ "Speaker not enabled due to temperature\n");
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+ return -EBUSY;
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+ }
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+
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+ snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
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+ 1 << w->shift, 1 << w->shift);
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+
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+ if (priv->spk_ena_pending) {
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+ msleep(75);
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+ snd_soc_write(codec, 0x4f5, 0xda);
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+ priv->spk_ena_pending = false;
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+ priv->spk_ena++;
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+ }
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+ break;
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+ case SND_SOC_DAPM_PRE_PMD:
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+ if (manual_ena) {
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+ priv->spk_ena--;
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+ if (!priv->spk_ena)
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+ snd_soc_write(codec, 0x4f5, 0x25a);
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+ }
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+
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+ snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
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+ 1 << w->shift, 0);
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+ break;
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+ case SND_SOC_DAPM_POST_PMD:
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+ if (manual_ena) {
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+ if (!priv->spk_ena)
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+ snd_soc_write(codec, 0x4f5, 0x0da);
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+ }
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+static irqreturn_t arizona_thermal_warn(int irq, void *data)
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+{
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+ struct arizona *arizona = data;
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+ unsigned int val;
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+ int ret;
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+
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+ ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
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+ &val);
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+ if (ret != 0) {
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+ dev_err(arizona->dev, "Failed to read thermal status: %d\n",
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+ ret);
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+ } else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) {
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+ dev_crit(arizona->dev, "Thermal warning\n");
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+ }
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
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+{
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+ struct arizona *arizona = data;
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+ unsigned int val;
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+ int ret;
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+
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+ ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
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+ &val);
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+ if (ret != 0) {
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+ dev_err(arizona->dev, "Failed to read thermal status: %d\n",
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+ ret);
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+ } else if (val & ARIZONA_SPK_SHUTDOWN_STS) {
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+ dev_crit(arizona->dev, "Thermal shutdown\n");
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+ ret = regmap_update_bits(arizona->regmap,
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+ ARIZONA_OUTPUT_ENABLES_1,
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+ ARIZONA_OUT4L_ENA |
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+ ARIZONA_OUT4R_ENA, 0);
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+ if (ret != 0)
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+ dev_crit(arizona->dev,
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+ "Failed to disable speaker outputs: %d\n",
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+ ret);
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+ }
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+
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+ return IRQ_HANDLED;
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+}
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+
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+static const struct snd_soc_dapm_widget arizona_spkl =
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+ SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
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+ ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
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+ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
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+
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+static const struct snd_soc_dapm_widget arizona_spkr =
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+ SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
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+ ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
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+ SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU);
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+
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+int arizona_init_spk(struct snd_soc_codec *codec)
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+{
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+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
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+ struct arizona *arizona = priv->arizona;
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+ int ret;
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+
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+ ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkl, 1);
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+ if (ret != 0)
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+ return ret;
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+
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+ ret = snd_soc_dapm_new_controls(&codec->dapm, &arizona_spkr, 1);
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+ if (ret != 0)
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+ return ret;
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+
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+ ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN_WARN,
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+ "Thermal warning", arizona_thermal_warn,
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+ arizona);
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+ if (ret != 0)
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+ dev_err(arizona->dev,
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+ "Failed to get thermal warning IRQ: %d\n",
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+ ret);
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+
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+ ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_SHUTDOWN,
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+ "Thermal shutdown", arizona_thermal_shutdown,
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+ arizona);
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+ if (ret != 0)
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+ dev_err(arizona->dev,
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+ "Failed to get thermal shutdown IRQ: %d\n",
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+ ret);
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+
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+ return 0;
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+}
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+EXPORT_SYMBOL_GPL(arizona_init_spk);
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+
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const char *arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
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"None",
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"Tone Generator 1",
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@@ -274,6 +432,33 @@ EXPORT_SYMBOL_GPL(arizona_mixer_values);
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const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
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EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
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+const char *arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
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+ "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
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+};
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+EXPORT_SYMBOL_GPL(arizona_rate_text);
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+
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+const int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
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+ 0, 1, 2, 8,
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+};
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+EXPORT_SYMBOL_GPL(arizona_rate_val);
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+
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+
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+const struct soc_enum arizona_isrc_fsl[] = {
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+ SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
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+ ARIZONA_ISRC1_FSL_SHIFT, 0xf,
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+ ARIZONA_RATE_ENUM_SIZE,
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+ arizona_rate_text, arizona_rate_val),
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+ SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
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+ ARIZONA_ISRC2_FSL_SHIFT, 0xf,
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+ ARIZONA_RATE_ENUM_SIZE,
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+ arizona_rate_text, arizona_rate_val),
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+ SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
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+ ARIZONA_ISRC3_FSL_SHIFT, 0xf,
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+ ARIZONA_RATE_ENUM_SIZE,
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+ arizona_rate_text, arizona_rate_val),
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+};
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+EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
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+
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static const char *arizona_vol_ramp_text[] = {
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"0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
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"15ms/6dB", "30ms/6dB",
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@@ -332,9 +517,27 @@ const struct soc_enum arizona_ng_hold =
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4, arizona_ng_hold_text);
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EXPORT_SYMBOL_GPL(arizona_ng_hold);
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+static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
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+{
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+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
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+ unsigned int val;
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+ int i;
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+
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+ if (ena)
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+ val = ARIZONA_IN_VU;
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+ else
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+ val = 0;
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+
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+ for (i = 0; i < priv->num_inputs; i++)
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+ snd_soc_update_bits(codec,
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+ ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
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+ ARIZONA_IN_VU, val);
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+}
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+
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int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
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int event)
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{
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+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
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unsigned int reg;
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if (w->shift % 2)
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@@ -343,13 +546,29 @@ int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
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reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
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switch (event) {
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+ case SND_SOC_DAPM_PRE_PMU:
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+ priv->in_pending++;
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+ break;
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case SND_SOC_DAPM_POST_PMU:
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snd_soc_update_bits(w->codec, reg, ARIZONA_IN1L_MUTE, 0);
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+
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+ /* If this is the last input pending then allow VU */
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+ priv->in_pending--;
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+ if (priv->in_pending == 0) {
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+ msleep(1);
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+ arizona_in_set_vu(w->codec, 1);
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+ }
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break;
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case SND_SOC_DAPM_PRE_PMD:
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- snd_soc_update_bits(w->codec, reg, ARIZONA_IN1L_MUTE,
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- ARIZONA_IN1L_MUTE);
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+ snd_soc_update_bits(w->codec, reg,
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+ ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
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+ ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
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break;
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+ case SND_SOC_DAPM_POST_PMD:
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+ /* Disable volume updates if no inputs are enabled */
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+ reg = snd_soc_read(w->codec, ARIZONA_INPUT_ENABLES);
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+ if (reg == 0)
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+ arizona_in_set_vu(w->codec, 0);
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}
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return 0;
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@@ -360,10 +579,61 @@ int arizona_out_ev(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol,
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int event)
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{
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+ switch (event) {
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+ case SND_SOC_DAPM_POST_PMU:
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+ switch (w->shift) {
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+ case ARIZONA_OUT1L_ENA_SHIFT:
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+ case ARIZONA_OUT1R_ENA_SHIFT:
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+ case ARIZONA_OUT2L_ENA_SHIFT:
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+ case ARIZONA_OUT2R_ENA_SHIFT:
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+ case ARIZONA_OUT3L_ENA_SHIFT:
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+ case ARIZONA_OUT3R_ENA_SHIFT:
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+ msleep(17);
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+ break;
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+
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+ default:
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+ break;
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+ }
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+ break;
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+ }
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+
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return 0;
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}
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EXPORT_SYMBOL_GPL(arizona_out_ev);
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+int arizona_hp_ev(struct snd_soc_dapm_widget *w,
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+ struct snd_kcontrol *kcontrol,
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+ int event)
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+{
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+ struct arizona_priv *priv = snd_soc_codec_get_drvdata(w->codec);
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+ unsigned int mask = 1 << w->shift;
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+ unsigned int val;
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+
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+ switch (event) {
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+ case SND_SOC_DAPM_POST_PMU:
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+ val = mask;
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+ break;
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+ case SND_SOC_DAPM_PRE_PMD:
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+ val = 0;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ /* Store the desired state for the HP outputs */
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+ priv->arizona->hp_ena &= ~mask;
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+ priv->arizona->hp_ena |= val;
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+
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+ /* Force off if HPDET magic is active */
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+ if (priv->arizona->hpdet_magic)
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+ val = 0;
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+
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+ snd_soc_update_bits(w->codec, ARIZONA_OUTPUT_ENABLES_1, mask, val);
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+
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+ return arizona_out_ev(w, kcontrol, event);
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+}
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+EXPORT_SYMBOL_GPL(arizona_hp_ev);
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+
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static unsigned int arizona_sysclk_48k_rates[] = {
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6144000,
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12288000,
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@@ -469,27 +739,27 @@ int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
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break;
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case 11289600:
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case 12288000:
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- val |= 1 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 22579200:
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case 24576000:
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- val |= 2 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 45158400:
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case 49152000:
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- val |= 3 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 67737600:
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case 73728000:
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- val |= 4 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 90316800:
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case 98304000:
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- val |= 5 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 135475200:
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case 147456000:
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- val |= 6 << ARIZONA_SYSCLK_FREQ_SHIFT;
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+ val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
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break;
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case 0:
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dev_dbg(arizona->dev, "%s cleared\n", name);
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@@ -783,7 +1053,7 @@ static int arizona_hw_params(struct snd_pcm_substream *substream,
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struct arizona *arizona = priv->arizona;
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int base = dai->driver->base;
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const int *rates;
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- int i, ret;
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+ int i, ret, val;
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int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
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int bclk, lrclk, wl, frame, bclk_target;
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@@ -799,6 +1069,13 @@ static int arizona_hw_params(struct snd_pcm_substream *substream,
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bclk_target *= chan_limit;
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}
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+ /* Force stereo for I2S mode */
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+ val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
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+ if (params_channels(params) == 1 && (val & ARIZONA_AIF1_FMT_MASK)) {
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+ arizona_aif_dbg(dai, "Forcing stereo mode\n");
|
|
|
+ bclk_target *= 2;
|
|
|
+ }
|
|
|
+
|
|
|
for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
|
|
|
if (rates[i] >= bclk_target &&
|
|
|
rates[i] % params_rate(params) == 0) {
|
|
|
@@ -955,6 +1232,16 @@ static struct {
|
|
|
{ 1000000, 13500000, 0, 1 },
|
|
|
};
|
|
|
|
|
|
+static struct {
|
|
|
+ unsigned int min;
|
|
|
+ unsigned int max;
|
|
|
+ u16 gain;
|
|
|
+} fll_gains[] = {
|
|
|
+ { 0, 256000, 0 },
|
|
|
+ { 256000, 1000000, 2 },
|
|
|
+ { 1000000, 13500000, 4 },
|
|
|
+};
|
|
|
+
|
|
|
struct arizona_fll_cfg {
|
|
|
int n;
|
|
|
int theta;
|
|
|
@@ -962,6 +1249,7 @@ struct arizona_fll_cfg {
|
|
|
int refdiv;
|
|
|
int outdiv;
|
|
|
int fratio;
|
|
|
+ int gain;
|
|
|
};
|
|
|
|
|
|
static int arizona_calc_fll(struct arizona_fll *fll,
|
|
|
@@ -1021,6 +1309,18 @@ static int arizona_calc_fll(struct arizona_fll *fll,
|
|
|
return -EINVAL;
|
|
|
}
|
|
|
|
|
|
+ for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
|
|
|
+ if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
|
|
|
+ cfg->gain = fll_gains[i].gain;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (i == ARRAY_SIZE(fll_gains)) {
|
|
|
+ arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
|
|
|
+ Fref);
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+
|
|
|
cfg->n = target / (ratio * Fref);
|
|
|
|
|
|
if (target % (ratio * Fref)) {
|
|
|
@@ -1048,13 +1348,15 @@ static int arizona_calc_fll(struct arizona_fll *fll,
|
|
|
cfg->n, cfg->theta, cfg->lambda);
|
|
|
arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n",
|
|
|
cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv);
|
|
|
+ arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain);
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
}
|
|
|
|
|
|
static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
|
|
|
- struct arizona_fll_cfg *cfg, int source)
|
|
|
+ struct arizona_fll_cfg *cfg, int source,
|
|
|
+ bool sync)
|
|
|
{
|
|
|
regmap_update_bits(arizona->regmap, base + 3,
|
|
|
ARIZONA_FLL1_THETA_MASK, cfg->theta);
|
|
|
@@ -1069,87 +1371,84 @@ static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
|
|
|
cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
|
|
|
source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
|
|
|
|
|
|
+ if (sync)
|
|
|
+ regmap_update_bits(arizona->regmap, base + 0x7,
|
|
|
+ ARIZONA_FLL1_GAIN_MASK,
|
|
|
+ cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
|
|
|
+ else
|
|
|
+ regmap_update_bits(arizona->regmap, base + 0x9,
|
|
|
+ ARIZONA_FLL1_GAIN_MASK,
|
|
|
+ cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
|
|
|
+
|
|
|
regmap_update_bits(arizona->regmap, base + 2,
|
|
|
ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
|
|
|
ARIZONA_FLL1_CTRL_UPD | cfg->n);
|
|
|
}
|
|
|
|
|
|
-int arizona_set_fll(struct arizona_fll *fll, int source,
|
|
|
- unsigned int Fref, unsigned int Fout)
|
|
|
+static bool arizona_is_enabled_fll(struct arizona_fll *fll)
|
|
|
{
|
|
|
struct arizona *arizona = fll->arizona;
|
|
|
- struct arizona_fll_cfg cfg, sync;
|
|
|
- unsigned int reg, val;
|
|
|
- int syncsrc;
|
|
|
- bool ena;
|
|
|
+ unsigned int reg;
|
|
|
int ret;
|
|
|
|
|
|
- if (fll->fref == Fref && fll->fout == Fout)
|
|
|
- return 0;
|
|
|
-
|
|
|
ret = regmap_read(arizona->regmap, fll->base + 1, ®);
|
|
|
if (ret != 0) {
|
|
|
arizona_fll_err(fll, "Failed to read current state: %d\n",
|
|
|
ret);
|
|
|
return ret;
|
|
|
}
|
|
|
- ena = reg & ARIZONA_FLL1_ENA;
|
|
|
|
|
|
- if (Fout) {
|
|
|
- /* Do we have a 32kHz reference? */
|
|
|
- regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
|
|
|
- switch (val & ARIZONA_CLK_32K_SRC_MASK) {
|
|
|
- case ARIZONA_CLK_SRC_MCLK1:
|
|
|
- case ARIZONA_CLK_SRC_MCLK2:
|
|
|
- syncsrc = val & ARIZONA_CLK_32K_SRC_MASK;
|
|
|
- break;
|
|
|
- default:
|
|
|
- syncsrc = -1;
|
|
|
- }
|
|
|
+ return reg & ARIZONA_FLL1_ENA;
|
|
|
+}
|
|
|
|
|
|
- if (source == syncsrc)
|
|
|
- syncsrc = -1;
|
|
|
+static void arizona_enable_fll(struct arizona_fll *fll,
|
|
|
+ struct arizona_fll_cfg *ref,
|
|
|
+ struct arizona_fll_cfg *sync)
|
|
|
+{
|
|
|
+ struct arizona *arizona = fll->arizona;
|
|
|
+ int ret;
|
|
|
|
|
|
- if (syncsrc >= 0) {
|
|
|
- ret = arizona_calc_fll(fll, &sync, Fref, Fout);
|
|
|
- if (ret != 0)
|
|
|
- return ret;
|
|
|
+ /*
|
|
|
+ * If we have both REFCLK and SYNCCLK then enable both,
|
|
|
+ * otherwise apply the SYNCCLK settings to REFCLK.
|
|
|
+ */
|
|
|
+ if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) {
|
|
|
+ regmap_update_bits(arizona->regmap, fll->base + 5,
|
|
|
+ ARIZONA_FLL1_OUTDIV_MASK,
|
|
|
+ ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
|
|
|
+
|
|
|
+ arizona_apply_fll(arizona, fll->base, ref, fll->ref_src,
|
|
|
+ false);
|
|
|
+ if (fll->sync_src >= 0)
|
|
|
+ arizona_apply_fll(arizona, fll->base + 0x10, sync,
|
|
|
+ fll->sync_src, true);
|
|
|
+ } else if (fll->sync_src >= 0) {
|
|
|
+ regmap_update_bits(arizona->regmap, fll->base + 5,
|
|
|
+ ARIZONA_FLL1_OUTDIV_MASK,
|
|
|
+ sync->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
|
|
|
+
|
|
|
+ arizona_apply_fll(arizona, fll->base, sync,
|
|
|
+ fll->sync_src, false);
|
|
|
|
|
|
- ret = arizona_calc_fll(fll, &cfg, 32768, Fout);
|
|
|
- if (ret != 0)
|
|
|
- return ret;
|
|
|
- } else {
|
|
|
- ret = arizona_calc_fll(fll, &cfg, Fref, Fout);
|
|
|
- if (ret != 0)
|
|
|
- return ret;
|
|
|
- }
|
|
|
- } else {
|
|
|
- regmap_update_bits(arizona->regmap, fll->base + 1,
|
|
|
- ARIZONA_FLL1_ENA, 0);
|
|
|
regmap_update_bits(arizona->regmap, fll->base + 0x11,
|
|
|
ARIZONA_FLL1_SYNC_ENA, 0);
|
|
|
-
|
|
|
- if (ena)
|
|
|
- pm_runtime_put_autosuspend(arizona->dev);
|
|
|
-
|
|
|
- fll->fref = Fref;
|
|
|
- fll->fout = Fout;
|
|
|
-
|
|
|
- return 0;
|
|
|
- }
|
|
|
-
|
|
|
- regmap_update_bits(arizona->regmap, fll->base + 5,
|
|
|
- ARIZONA_FLL1_OUTDIV_MASK,
|
|
|
- cfg.outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
|
|
|
-
|
|
|
- if (syncsrc >= 0) {
|
|
|
- arizona_apply_fll(arizona, fll->base, &cfg, syncsrc);
|
|
|
- arizona_apply_fll(arizona, fll->base + 0x10, &sync, source);
|
|
|
} else {
|
|
|
- arizona_apply_fll(arizona, fll->base, &cfg, source);
|
|
|
+ arizona_fll_err(fll, "No clocks provided\n");
|
|
|
+ return;
|
|
|
}
|
|
|
|
|
|
- if (!ena)
|
|
|
+ /*
|
|
|
+ * Increase the bandwidth if we're not using a low frequency
|
|
|
+ * sync source.
|
|
|
+ */
|
|
|
+ if (fll->sync_src >= 0 && fll->sync_freq > 100000)
|
|
|
+ regmap_update_bits(arizona->regmap, fll->base + 0x17,
|
|
|
+ ARIZONA_FLL1_SYNC_BW, 0);
|
|
|
+ else
|
|
|
+ regmap_update_bits(arizona->regmap, fll->base + 0x17,
|
|
|
+ ARIZONA_FLL1_SYNC_BW, ARIZONA_FLL1_SYNC_BW);
|
|
|
+
|
|
|
+ if (!arizona_is_enabled_fll(fll))
|
|
|
pm_runtime_get(arizona->dev);
|
|
|
|
|
|
/* Clear any pending completions */
|
|
|
@@ -1157,7 +1456,8 @@ int arizona_set_fll(struct arizona_fll *fll, int source,
|
|
|
|
|
|
regmap_update_bits(arizona->regmap, fll->base + 1,
|
|
|
ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
|
|
|
- if (syncsrc >= 0)
|
|
|
+ if (fll->ref_src >= 0 && fll->sync_src >= 0 &&
|
|
|
+ fll->ref_src != fll->sync_src)
|
|
|
regmap_update_bits(arizona->regmap, fll->base + 0x11,
|
|
|
ARIZONA_FLL1_SYNC_ENA,
|
|
|
ARIZONA_FLL1_SYNC_ENA);
|
|
|
@@ -1166,10 +1466,88 @@ int arizona_set_fll(struct arizona_fll *fll, int source,
|
|
|
msecs_to_jiffies(250));
|
|
|
if (ret == 0)
|
|
|
arizona_fll_warn(fll, "Timed out waiting for lock\n");
|
|
|
+}
|
|
|
+
|
|
|
+static void arizona_disable_fll(struct arizona_fll *fll)
|
|
|
+{
|
|
|
+ struct arizona *arizona = fll->arizona;
|
|
|
+ bool change;
|
|
|
+
|
|
|
+ regmap_update_bits_check(arizona->regmap, fll->base + 1,
|
|
|
+ ARIZONA_FLL1_ENA, 0, &change);
|
|
|
+ regmap_update_bits(arizona->regmap, fll->base + 0x11,
|
|
|
+ ARIZONA_FLL1_SYNC_ENA, 0);
|
|
|
+
|
|
|
+ if (change)
|
|
|
+ pm_runtime_put_autosuspend(arizona->dev);
|
|
|
+}
|
|
|
+
|
|
|
+int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
|
|
|
+ unsigned int Fref, unsigned int Fout)
|
|
|
+{
|
|
|
+ struct arizona_fll_cfg ref, sync;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (fll->ref_src == source && fll->ref_freq == Fref)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if (fll->fout && Fref > 0) {
|
|
|
+ ret = arizona_calc_fll(fll, &ref, Fref, fll->fout);
|
|
|
+ if (ret != 0)
|
|
|
+ return ret;
|
|
|
+
|
|
|
+ if (fll->sync_src >= 0) {
|
|
|
+ ret = arizona_calc_fll(fll, &sync, fll->sync_freq,
|
|
|
+ fll->fout);
|
|
|
+ if (ret != 0)
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ fll->ref_src = source;
|
|
|
+ fll->ref_freq = Fref;
|
|
|
|
|
|
- fll->fref = Fref;
|
|
|
+ if (fll->fout && Fref > 0) {
|
|
|
+ arizona_enable_fll(fll, &ref, &sync);
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
|
|
|
+
|
|
|
+int arizona_set_fll(struct arizona_fll *fll, int source,
|
|
|
+ unsigned int Fref, unsigned int Fout)
|
|
|
+{
|
|
|
+ struct arizona_fll_cfg ref, sync;
|
|
|
+ int ret;
|
|
|
+
|
|
|
+ if (fll->sync_src == source &&
|
|
|
+ fll->sync_freq == Fref && fll->fout == Fout)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ if (Fout) {
|
|
|
+ if (fll->ref_src >= 0) {
|
|
|
+ ret = arizona_calc_fll(fll, &ref, fll->ref_freq,
|
|
|
+ Fout);
|
|
|
+ if (ret != 0)
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ ret = arizona_calc_fll(fll, &sync, Fref, Fout);
|
|
|
+ if (ret != 0)
|
|
|
+ return ret;
|
|
|
+ }
|
|
|
+
|
|
|
+ fll->sync_src = source;
|
|
|
+ fll->sync_freq = Fref;
|
|
|
fll->fout = Fout;
|
|
|
|
|
|
+ if (Fout) {
|
|
|
+ arizona_enable_fll(fll, &ref, &sync);
|
|
|
+ } else {
|
|
|
+ arizona_disable_fll(fll);
|
|
|
+ }
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
EXPORT_SYMBOL_GPL(arizona_set_fll);
|
|
|
@@ -1178,12 +1556,26 @@ int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
|
|
|
int ok_irq, struct arizona_fll *fll)
|
|
|
{
|
|
|
int ret;
|
|
|
+ unsigned int val;
|
|
|
|
|
|
init_completion(&fll->ok);
|
|
|
|
|
|
fll->id = id;
|
|
|
fll->base = base;
|
|
|
fll->arizona = arizona;
|
|
|
+ fll->sync_src = ARIZONA_FLL_SRC_NONE;
|
|
|
+
|
|
|
+ /* Configure default refclk to 32kHz if we have one */
|
|
|
+ regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
|
|
|
+ switch (val & ARIZONA_CLK_32K_SRC_MASK) {
|
|
|
+ case ARIZONA_CLK_SRC_MCLK1:
|
|
|
+ case ARIZONA_CLK_SRC_MCLK2:
|
|
|
+ fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ fll->ref_src = ARIZONA_FLL_SRC_NONE;
|
|
|
+ }
|
|
|
+ fll->ref_freq = 32768;
|
|
|
|
|
|
snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
|
|
|
snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
|
Mark Brown