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@@ -19,6 +19,7 @@
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#include <mach/addr-map.h>
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#include <mach/cputype.h>
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#include <mach/regs-apbc.h>
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+#include <mach/regs-apmu.h>
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#include <mach/irqs.h>
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#include <mach/gpio.h>
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#include <mach/dma.h>
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@@ -72,6 +73,8 @@ static APBC_CLK(pwm2, PXA168_PWM2, 1, 13000000);
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static APBC_CLK(pwm3, PXA168_PWM3, 1, 13000000);
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static APBC_CLK(pwm4, PXA168_PWM4, 1, 13000000);
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+static APMU_CLK(nand, NAND, 0x01db, 208000000);
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+
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/* device and clock bindings */
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static struct clk_lookup pxa168_clkregs[] = {
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INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
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@@ -82,6 +85,7 @@ static struct clk_lookup pxa168_clkregs[] = {
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INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
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INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
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INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
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+ INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
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};
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static int __init pxa168_init(void)
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@@ -127,3 +131,4 @@ PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
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PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
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PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
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PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
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+PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
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