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@@ -1016,8 +1016,7 @@ done:
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}
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static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
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- struct x86_emulate_ops *ops,
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- int *no_wb)
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+ struct x86_emulate_ops *ops)
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{
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struct decode_cache *c = &ctxt->decode;
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int rc;
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@@ -1055,7 +1054,7 @@ static inline int emulate_grp45(struct x86_emulate_ctxt *ctxt,
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c->dst.bytes, ctxt->vcpu);
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if (rc != 0)
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return rc;
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- *no_wb = 1;
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+ c->dst.type = OP_NONE;
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break;
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default:
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DPRINTF("Cannot emulate %02x\n", c->b);
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@@ -1137,6 +1136,10 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
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ctxt->vcpu);
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if (rc != 0)
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return rc;
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+ break;
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+ case OP_NONE:
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+ /* no writeback */
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+ break;
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default:
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break;
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}
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@@ -1147,7 +1150,6 @@ int
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x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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{
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unsigned long cr2 = ctxt->cr2;
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- int no_wb = 0;
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u64 msr_data;
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unsigned long saved_eip = 0;
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struct decode_cache *c = &ctxt->decode;
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@@ -1344,18 +1346,16 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
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goto done;
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break;
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case 0xfe ... 0xff: /* Grp4/Grp5 */
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- rc = emulate_grp45(ctxt, ops, &no_wb);
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+ rc = emulate_grp45(ctxt, ops);
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if (rc != 0)
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goto done;
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break;
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}
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writeback:
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- if (!no_wb) {
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- rc = writeback(ctxt, ops);
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- if (rc != 0)
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- goto done;
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- }
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+ rc = writeback(ctxt, ops);
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+ if (rc != 0)
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+ goto done;
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/* Commit shadow register state. */
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memcpy(ctxt->vcpu->regs, c->regs, sizeof c->regs);
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@@ -1395,7 +1395,7 @@ special_insn:
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register_address_increment(c->regs[VCPU_REGS_RSP],
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c->op_bytes);
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- no_wb = 1; /* Disable writeback. */
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+ c->dst.type = OP_NONE; /* Disable writeback. */
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break;
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case 0x6a: /* push imm8 */
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c->src.val = 0L;
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@@ -1538,7 +1538,7 @@ special_insn:
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case 0xe9: /* jmp rel */
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case 0xeb: /* jmp rel short */
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JMP_REL(c->src.val);
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- no_wb = 1; /* Disable writeback. */
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+ c->dst.type = OP_NONE; /* Disable writeback. */
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break;
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@@ -1548,8 +1548,6 @@ special_insn:
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twobyte_insn:
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switch (c->b) {
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case 0x01: /* lgdt, lidt, lmsw */
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- /* Disable writeback. */
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- no_wb = 1;
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switch (c->modrm_reg) {
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u16 size;
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unsigned long address;
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@@ -1604,56 +1602,30 @@ twobyte_insn:
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default:
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goto cannot_emulate;
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}
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+ /* Disable writeback. */
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+ c->dst.type = OP_NONE;
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break;
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case 0x21: /* mov from dr to reg */
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- no_wb = 1;
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if (c->modrm_mod != 3)
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goto cannot_emulate;
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rc = emulator_get_dr(ctxt, c->modrm_reg, &c->regs[c->modrm_rm]);
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+ if (rc)
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+ goto cannot_emulate;
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+ c->dst.type = OP_NONE; /* no writeback */
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break;
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case 0x23: /* mov from reg to dr */
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- no_wb = 1;
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if (c->modrm_mod != 3)
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goto cannot_emulate;
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rc = emulator_set_dr(ctxt, c->modrm_reg,
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c->regs[c->modrm_rm]);
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+ if (rc)
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+ goto cannot_emulate;
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+ c->dst.type = OP_NONE; /* no writeback */
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break;
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case 0x40 ... 0x4f: /* cmov */
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c->dst.val = c->dst.orig_val = c->src.val;
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- no_wb = 1;
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- /*
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- * First, assume we're decoding an even cmov opcode
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- * (lsb == 0).
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- */
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- switch ((c->b & 15) >> 1) {
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- case 0: /* cmovo */
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- no_wb = (ctxt->eflags & EFLG_OF) ? 0 : 1;
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- break;
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- case 1: /* cmovb/cmovc/cmovnae */
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- no_wb = (ctxt->eflags & EFLG_CF) ? 0 : 1;
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- break;
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- case 2: /* cmovz/cmove */
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- no_wb = (ctxt->eflags & EFLG_ZF) ? 0 : 1;
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- break;
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- case 3: /* cmovbe/cmovna */
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- no_wb = (ctxt->eflags & (EFLG_CF | EFLG_ZF)) ? 0 : 1;
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- break;
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- case 4: /* cmovs */
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- no_wb = (ctxt->eflags & EFLG_SF) ? 0 : 1;
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- break;
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- case 5: /* cmovp/cmovpe */
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- no_wb = (ctxt->eflags & EFLG_PF) ? 0 : 1;
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- break;
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- case 7: /* cmovle/cmovng */
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- no_wb = (ctxt->eflags & EFLG_ZF) ? 0 : 1;
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- /* fall through */
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- case 6: /* cmovl/cmovnge */
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- no_wb &= (!(ctxt->eflags & EFLG_SF) !=
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- !(ctxt->eflags & EFLG_OF)) ? 0 : 1;
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- break;
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- }
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- /* Odd cmov opcodes (lsb == 1) have inverted sense. */
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- no_wb ^= c->b & 1;
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+ if (!test_cc(c->b, ctxt->eflags))
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+ c->dst.type = OP_NONE; /* no writeback */
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break;
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case 0xa3:
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bt: /* bt */
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@@ -1727,8 +1699,6 @@ twobyte_insn:
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goto writeback;
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twobyte_special_insn:
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- /* Disable writeback. */
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- no_wb = 1;
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switch (c->b) {
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case 0x06:
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emulate_clts(ctxt->vcpu);
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@@ -1802,6 +1772,8 @@ twobyte_special_insn:
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goto done;
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break;
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}
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+ /* Disable writeback. */
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+ c->dst.type = OP_NONE;
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goto writeback;
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cannot_emulate:
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