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@@ -11,8 +11,7 @@
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#ifndef __ASM_ARCH_REGS_UDC_H
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#ifndef __ASM_ARCH_REGS_UDC_H
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#define __ASM_ARCH_REGS_UDC_H
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#define __ASM_ARCH_REGS_UDC_H
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-
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-#define S3C2410_USBDREG(x) ((x) + S3C24XX_VA_USBDEV)
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+#define S3C2410_USBDREG(x) (x)
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#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
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#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140)
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#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
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#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144)
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@@ -136,8 +135,8 @@
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#define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W
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#define S3C2410_UDC_OCSR2_ISO (1<<6) // R/W
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#define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W
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#define S3C2410_UDC_OCSR2_DMAIEN (1<<5) // R/W
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-#define S3C2410_UDC_SETIX(x) \
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- __raw_writel(S3C2410_UDC_INDEX_ ## x, S3C2410_UDC_INDEX_REG);
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+#define S3C2410_UDC_SETIX(base,x) \
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+ writel(S3C2410_UDC_INDEX_ ## x, base+S3C2410_UDC_INDEX_REG);
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#define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0)
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#define S3C2410_UDC_EP0_CSR_OPKRDY (1<<0)
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