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@@ -41,8 +41,6 @@
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#include "control.h"
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#include "mux.h"
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-#define UART_OMAP_WER 0x17 /* Wake-up enable register */
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-
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#define UART_ERRATA_i202_MDR1_ACCESS (0x1 << 1)
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/*
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@@ -66,60 +64,16 @@ struct omap_uart_state {
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int clocked;
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- int regshift;
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- void __iomem *membase;
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- resource_size_t mapbase;
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-
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struct list_head node;
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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u32 errata;
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-#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM)
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- int context_valid;
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-
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- /* Registers to be saved/restored for OFF-mode */
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- u16 dll;
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- u16 dlh;
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- u16 ier;
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- u16 sysc;
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- u16 scr;
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- u16 wer;
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- u16 mcr;
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-#endif
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};
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static LIST_HEAD(uart_list);
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static u8 num_uarts;
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-static inline unsigned int __serial_read_reg(struct uart_port *up,
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- int offset)
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-{
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- offset <<= up->regshift;
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- return (unsigned int)__raw_readb(up->membase + offset);
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-}
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-
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-static inline unsigned int serial_read_reg(struct omap_uart_state *uart,
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- int offset)
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-{
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- offset <<= uart->regshift;
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- return (unsigned int)__raw_readb(uart->membase + offset);
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-}
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-
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-static inline void __serial_write_reg(struct uart_port *up, int offset,
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- int value)
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-{
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- offset <<= up->regshift;
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- __raw_writeb(value, up->membase + offset);
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-}
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-
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-static inline void serial_write_reg(struct omap_uart_state *uart, int offset,
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- int value)
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-{
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- offset <<= uart->regshift;
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- __raw_writeb(value, uart->membase + offset);
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-}
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-
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/*
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* Internal UARTs need to be initialized for the 8250 autoconfig to work
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* properly. Note that the TX watermark initialization may not be needed
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@@ -170,75 +124,6 @@ static void omap_uart_mdr1_errataset(struct omap_uart_state *uart, u8 mdr1_val,
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}
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}
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-static void omap_uart_save_context(struct omap_uart_state *uart)
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-{
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- u16 lcr = 0;
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-
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- if (!enable_off_mode)
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- return;
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-
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- lcr = serial_read_reg(uart, UART_LCR);
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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- uart->dll = serial_read_reg(uart, UART_DLL);
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- uart->dlh = serial_read_reg(uart, UART_DLM);
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- serial_write_reg(uart, UART_LCR, lcr);
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- uart->ier = serial_read_reg(uart, UART_IER);
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- uart->sysc = serial_read_reg(uart, UART_OMAP_SYSC);
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- uart->scr = serial_read_reg(uart, UART_OMAP_SCR);
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- uart->wer = serial_read_reg(uart, UART_OMAP_WER);
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
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- uart->mcr = serial_read_reg(uart, UART_MCR);
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- serial_write_reg(uart, UART_LCR, lcr);
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-
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- uart->context_valid = 1;
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-}
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-
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-static void omap_uart_restore_context(struct omap_uart_state *uart)
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-{
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- u16 efr = 0;
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-
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- if (!enable_off_mode)
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- return;
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-
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- if (!uart->context_valid)
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- return;
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-
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- uart->context_valid = 0;
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-
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- if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
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- omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_DISABLE, 0xA0);
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- else
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- serial_write_reg(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
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-
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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- efr = serial_read_reg(uart, UART_EFR);
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- serial_write_reg(uart, UART_EFR, UART_EFR_ECB);
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- serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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- serial_write_reg(uart, UART_IER, 0x0);
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_write_reg(uart, UART_DLL, uart->dll);
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- serial_write_reg(uart, UART_DLM, uart->dlh);
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- serial_write_reg(uart, UART_LCR, 0x0); /* Operational mode */
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- serial_write_reg(uart, UART_IER, uart->ier);
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_A);
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- serial_write_reg(uart, UART_MCR, uart->mcr);
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- serial_write_reg(uart, UART_LCR, UART_LCR_CONF_MODE_B);
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- serial_write_reg(uart, UART_EFR, efr);
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- serial_write_reg(uart, UART_LCR, UART_LCR_WLEN8);
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- serial_write_reg(uart, UART_OMAP_SCR, uart->scr);
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- serial_write_reg(uart, UART_OMAP_WER, uart->wer);
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- serial_write_reg(uart, UART_OMAP_SYSC, uart->sysc);
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-
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- if (uart->errata & UART_ERRATA_i202_MDR1_ACCESS)
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- omap_uart_mdr1_errataset(uart, UART_OMAP_MDR1_16X_MODE, 0xA1);
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- else
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- /* UART 16x mode */
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- serial_write_reg(uart, UART_OMAP_MDR1,
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- UART_OMAP_MDR1_16X_MODE);
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-}
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-#else
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-static inline void omap_uart_save_context(struct omap_uart_state *uart) {}
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-static inline void omap_uart_restore_context(struct omap_uart_state *uart) {}
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#endif /* CONFIG_PM && CONFIG_ARCH_OMAP3 */
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static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
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@@ -621,9 +506,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
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omap_device_disable_idle_on_suspend(pdev);
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oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
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- uart->regshift = 2;
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- uart->mapbase = oh->slaves[0]->addr->pa_start;
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- uart->membase = omap_hwmod_get_mpu_rt_va(oh);
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uart->pdev = pdev;
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oh->dev_attr = uart;
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