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@@ -516,7 +516,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
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/* Disable Clock */
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if (sdd->port_conf->clk_from_cmu) {
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- clk_disable(sdd->src_clk);
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+ clk_disable_unprepare(sdd->src_clk);
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} else {
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val = readl(regs + S3C64XX_SPI_CLK_CFG);
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val &= ~S3C64XX_SPI_ENCLK_ENABLE;
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@@ -564,7 +564,7 @@ static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
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/* There is half-multiplier before the SPI */
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clk_set_rate(sdd->src_clk, sdd->cur_speed * 2);
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/* Enable Clock */
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- clk_enable(sdd->src_clk);
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+ clk_prepare_enable(sdd->src_clk);
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} else {
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/* Configure Clock */
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val = readl(regs + S3C64XX_SPI_CLK_CFG);
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@@ -1302,7 +1302,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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goto err3;
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}
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- if (clk_enable(sdd->clk)) {
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+ if (clk_prepare_enable(sdd->clk)) {
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dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
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ret = -EBUSY;
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goto err4;
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@@ -1317,7 +1317,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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goto err5;
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}
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- if (clk_enable(sdd->src_clk)) {
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+ if (clk_prepare_enable(sdd->src_clk)) {
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dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
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ret = -EBUSY;
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goto err6;
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@@ -1361,11 +1361,11 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
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err8:
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free_irq(irq, sdd);
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err7:
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- clk_disable(sdd->src_clk);
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+ clk_disable_unprepare(sdd->src_clk);
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err6:
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clk_put(sdd->src_clk);
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err5:
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- clk_disable(sdd->clk);
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+ clk_disable_unprepare(sdd->clk);
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err4:
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clk_put(sdd->clk);
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err3:
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@@ -1393,10 +1393,10 @@ static int s3c64xx_spi_remove(struct platform_device *pdev)
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free_irq(platform_get_irq(pdev, 0), sdd);
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- clk_disable(sdd->src_clk);
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+ clk_disable_unprepare(sdd->src_clk);
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clk_put(sdd->src_clk);
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- clk_disable(sdd->clk);
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+ clk_disable_unprepare(sdd->clk);
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clk_put(sdd->clk);
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if (!sdd->cntrlr_info->cfg_gpio && pdev->dev.of_node)
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@@ -1417,8 +1417,8 @@ static int s3c64xx_spi_suspend(struct device *dev)
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spi_master_suspend(master);
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/* Disable the clock */
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- clk_disable(sdd->src_clk);
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- clk_disable(sdd->clk);
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+ clk_disable_unprepare(sdd->src_clk);
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+ clk_disable_unprepare(sdd->clk);
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if (!sdd->cntrlr_info->cfg_gpio && dev->of_node)
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s3c64xx_spi_dt_gpio_free(sdd);
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@@ -1440,8 +1440,8 @@ static int s3c64xx_spi_resume(struct device *dev)
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sci->cfg_gpio();
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/* Enable the clock */
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- clk_enable(sdd->src_clk);
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- clk_enable(sdd->clk);
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+ clk_prepare_enable(sdd->src_clk);
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+ clk_prepare_enable(sdd->clk);
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s3c64xx_spi_hwinit(sdd, sdd->port_id);
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@@ -1457,8 +1457,8 @@ static int s3c64xx_spi_runtime_suspend(struct device *dev)
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struct spi_master *master = dev_get_drvdata(dev);
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
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- clk_disable(sdd->clk);
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- clk_disable(sdd->src_clk);
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+ clk_disable_unprepare(sdd->clk);
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+ clk_disable_unprepare(sdd->src_clk);
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return 0;
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}
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@@ -1468,8 +1468,8 @@ static int s3c64xx_spi_runtime_resume(struct device *dev)
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struct spi_master *master = dev_get_drvdata(dev);
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
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- clk_enable(sdd->src_clk);
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- clk_enable(sdd->clk);
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+ clk_prepare_enable(sdd->src_clk);
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+ clk_prepare_enable(sdd->clk);
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return 0;
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}
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