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@@ -120,7 +120,6 @@ struct mvebu_pcie_port {
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char *name;
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void __iomem *base;
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spinlock_t conf_lock;
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- int haslink;
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u32 port;
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u32 lane;
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int devfn;
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@@ -560,7 +559,7 @@ static int mvebu_pcie_wr_conf(struct pci_bus *bus, u32 devfn,
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if (bus->number == 0)
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return mvebu_sw_pci_bridge_write(port, where, size, val);
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- if (!port->haslink)
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+ if (!mvebu_pcie_link_up(port))
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return PCIBIOS_DEVICE_NOT_FOUND;
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/*
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@@ -602,7 +601,7 @@ static int mvebu_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where,
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if (bus->number == 0)
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return mvebu_sw_pci_bridge_read(port, where, size, val);
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- if (!port->haslink) {
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+ if (!mvebu_pcie_link_up(port)) {
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*val = 0xffffffff;
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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@@ -950,14 +949,12 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
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mvebu_pcie_set_local_dev_nr(port, 1);
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- if (mvebu_pcie_link_up(port)) {
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- port->haslink = 1;
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- dev_info(&pdev->dev, "PCIe%d.%d: link up\n",
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- port->port, port->lane);
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- } else {
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- port->haslink = 0;
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- dev_info(&pdev->dev, "PCIe%d.%d: link down\n",
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- port->port, port->lane);
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+ port->clk = of_clk_get_by_name(child, NULL);
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+ if (IS_ERR(port->clk)) {
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+ dev_err(&pdev->dev, "PCIe%d.%d: cannot get clock\n",
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+ port->port, port->lane);
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+ iounmap(port->base);
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+ continue;
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}
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port->dn = child;
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