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@@ -20,15 +20,15 @@
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/i2c-pnx.h>
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#include <linux/i2c-pnx.h>
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#include <linux/io.h>
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#include <linux/io.h>
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+#include <linux/err.h>
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+#include <linux/clk.h>
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+
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#include <mach/hardware.h>
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#include <mach/hardware.h>
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#include <mach/i2c.h>
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#include <mach/i2c.h>
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-#include <asm/irq.h>
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-#include <asm/uaccess.h>
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#define I2C_PNX_TIMEOUT 10 /* msec */
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#define I2C_PNX_TIMEOUT 10 /* msec */
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#define I2C_PNX_SPEED_KHZ 100
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#define I2C_PNX_SPEED_KHZ 100
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#define I2C_PNX_REGION_SIZE 0x100
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#define I2C_PNX_REGION_SIZE 0x100
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-#define PNX_DEFAULT_FREQ 13 /* MHz */
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static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
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static inline int wait_timeout(long timeout, struct i2c_pnx_algo_data *data)
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{
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{
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@@ -50,22 +50,21 @@ static inline int wait_reset(long timeout, struct i2c_pnx_algo_data *data)
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return (timeout <= 0);
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return (timeout <= 0);
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}
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}
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-static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
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+static inline void i2c_pnx_arm_timer(struct i2c_pnx_algo_data *alg_data)
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{
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{
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- struct i2c_pnx_algo_data *data = adap->algo_data;
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- struct timer_list *timer = &data->mif.timer;
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- int expires = I2C_PNX_TIMEOUT / (1000 / HZ);
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+ struct timer_list *timer = &alg_data->mif.timer;
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+ unsigned long expires = msecs_to_jiffies(I2C_PNX_TIMEOUT);
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if (expires <= 1)
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if (expires <= 1)
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expires = 2;
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expires = 2;
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del_timer_sync(timer);
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del_timer_sync(timer);
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- dev_dbg(&adap->dev, "Timer armed at %lu plus %u jiffies.\n",
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+ dev_dbg(&alg_data->adapter.dev, "Timer armed at %lu plus %lu jiffies.\n",
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jiffies, expires);
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jiffies, expires);
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timer->expires = jiffies + expires;
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timer->expires = jiffies + expires;
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- timer->data = (unsigned long)adap;
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+ timer->data = (unsigned long)&alg_data;
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add_timer(timer);
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add_timer(timer);
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}
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}
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@@ -77,34 +76,34 @@ static inline void i2c_pnx_arm_timer(struct i2c_adapter *adap)
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*
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*
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* Generate a START signal in the desired mode.
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* Generate a START signal in the desired mode.
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*/
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*/
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-static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
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+static int i2c_pnx_start(unsigned char slave_addr,
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+ struct i2c_pnx_algo_data *alg_data)
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{
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{
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- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
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-
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- dev_dbg(&adap->dev, "%s(): addr 0x%x mode %d\n", __func__,
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+ dev_dbg(&alg_data->adapter.dev, "%s(): addr 0x%x mode %d\n", __func__,
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slave_addr, alg_data->mif.mode);
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slave_addr, alg_data->mif.mode);
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/* Check for 7 bit slave addresses only */
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/* Check for 7 bit slave addresses only */
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if (slave_addr & ~0x7f) {
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if (slave_addr & ~0x7f) {
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- dev_err(&adap->dev, "%s: Invalid slave address %x. "
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- "Only 7-bit addresses are supported\n",
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- adap->name, slave_addr);
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+ dev_err(&alg_data->adapter.dev,
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+ "%s: Invalid slave address %x. Only 7-bit addresses are supported\n",
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+ alg_data->adapter.name, slave_addr);
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return -EINVAL;
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return -EINVAL;
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}
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}
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/* First, make sure bus is idle */
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/* First, make sure bus is idle */
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data)) {
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/* Somebody else is monopolizing the bus */
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/* Somebody else is monopolizing the bus */
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- dev_err(&adap->dev, "%s: Bus busy. Slave addr = %02x, "
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- "cntrl = %x, stat = %x\n",
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- adap->name, slave_addr,
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- ioread32(I2C_REG_CTL(alg_data)),
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- ioread32(I2C_REG_STS(alg_data)));
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+ dev_err(&alg_data->adapter.dev,
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+ "%s: Bus busy. Slave addr = %02x, cntrl = %x, stat = %x\n",
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+ alg_data->adapter.name, slave_addr,
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+ ioread32(I2C_REG_CTL(alg_data)),
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+ ioread32(I2C_REG_STS(alg_data)));
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return -EBUSY;
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return -EBUSY;
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} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
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} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {
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/* Sorry, we lost the bus */
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/* Sorry, we lost the bus */
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- dev_err(&adap->dev, "%s: Arbitration failure. "
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- "Slave addr = %02x\n", adap->name, slave_addr);
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+ dev_err(&alg_data->adapter.dev,
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+ "%s: Arbitration failure. Slave addr = %02x\n",
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+ alg_data->adapter.name, slave_addr);
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return -EIO;
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return -EIO;
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}
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}
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@@ -115,14 +114,14 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
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iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
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iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,
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I2C_REG_STS(alg_data));
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I2C_REG_STS(alg_data));
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- dev_dbg(&adap->dev, "%s(): sending %#x\n", __func__,
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+ dev_dbg(&alg_data->adapter.dev, "%s(): sending %#x\n", __func__,
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(slave_addr << 1) | start_bit | alg_data->mif.mode);
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(slave_addr << 1) | start_bit | alg_data->mif.mode);
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/* Write the slave address, START bit and R/W bit */
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/* Write the slave address, START bit and R/W bit */
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iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
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iowrite32((slave_addr << 1) | start_bit | alg_data->mif.mode,
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I2C_REG_TX(alg_data));
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I2C_REG_TX(alg_data));
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- dev_dbg(&adap->dev, "%s(): exit\n", __func__);
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+ dev_dbg(&alg_data->adapter.dev, "%s(): exit\n", __func__);
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return 0;
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return 0;
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}
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}
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@@ -133,13 +132,12 @@ static int i2c_pnx_start(unsigned char slave_addr, struct i2c_adapter *adap)
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*
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*
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* Generate a STOP signal to terminate the master transaction.
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* Generate a STOP signal to terminate the master transaction.
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*/
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*/
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-static void i2c_pnx_stop(struct i2c_adapter *adap)
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+static void i2c_pnx_stop(struct i2c_pnx_algo_data *alg_data)
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{
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{
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- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
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/* Only 1 msec max timeout due to interrupt context */
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/* Only 1 msec max timeout due to interrupt context */
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long timeout = 1000;
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long timeout = 1000;
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- dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
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+ dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
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__func__, ioread32(I2C_REG_STS(alg_data)));
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__func__, ioread32(I2C_REG_STS(alg_data)));
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/* Write a STOP bit to TX FIFO */
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/* Write a STOP bit to TX FIFO */
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@@ -153,7 +151,7 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
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timeout--;
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timeout--;
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}
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}
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- dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
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+ dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
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__func__, ioread32(I2C_REG_STS(alg_data)));
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__func__, ioread32(I2C_REG_STS(alg_data)));
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}
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}
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@@ -163,12 +161,11 @@ static void i2c_pnx_stop(struct i2c_adapter *adap)
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*
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*
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* Sends one byte of data to the slave
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* Sends one byte of data to the slave
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*/
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*/
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-static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
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+static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data)
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{
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{
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- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
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u32 val;
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u32 val;
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- dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
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+ dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
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__func__, ioread32(I2C_REG_STS(alg_data)));
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__func__, ioread32(I2C_REG_STS(alg_data)));
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if (alg_data->mif.len > 0) {
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if (alg_data->mif.len > 0) {
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@@ -184,15 +181,15 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
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alg_data->mif.len--;
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alg_data->mif.len--;
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iowrite32(val, I2C_REG_TX(alg_data));
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iowrite32(val, I2C_REG_TX(alg_data));
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- dev_dbg(&adap->dev, "%s(): xmit %#x [%d]\n", __func__,
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- val, alg_data->mif.len + 1);
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+ dev_dbg(&alg_data->adapter.dev, "%s(): xmit %#x [%d]\n",
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+ __func__, val, alg_data->mif.len + 1);
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if (alg_data->mif.len == 0) {
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if (alg_data->mif.len == 0) {
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if (alg_data->last) {
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if (alg_data->last) {
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/* Wait until the STOP is seen. */
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/* Wait until the STOP is seen. */
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
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- dev_err(&adap->dev, "The bus is still "
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- "active after timeout\n");
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+ dev_err(&alg_data->adapter.dev,
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+ "The bus is still active after timeout\n");
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}
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}
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/* Disable master interrupts */
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/* Disable master interrupts */
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iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
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iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
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@@ -201,14 +198,15 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
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del_timer_sync(&alg_data->mif.timer);
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del_timer_sync(&alg_data->mif.timer);
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- dev_dbg(&adap->dev, "%s(): Waking up xfer routine.\n",
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+ dev_dbg(&alg_data->adapter.dev,
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+ "%s(): Waking up xfer routine.\n",
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__func__);
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__func__);
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complete(&alg_data->mif.complete);
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complete(&alg_data->mif.complete);
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}
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}
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} else if (alg_data->mif.len == 0) {
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} else if (alg_data->mif.len == 0) {
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/* zero-sized transfer */
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/* zero-sized transfer */
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- i2c_pnx_stop(adap);
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+ i2c_pnx_stop(alg_data);
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/* Disable master interrupts. */
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/* Disable master interrupts. */
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iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
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iowrite32(ioread32(I2C_REG_CTL(alg_data)) &
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@@ -217,13 +215,14 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
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/* Stop timer. */
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/* Stop timer. */
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del_timer_sync(&alg_data->mif.timer);
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del_timer_sync(&alg_data->mif.timer);
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- dev_dbg(&adap->dev, "%s(): Waking up xfer routine after "
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- "zero-xfer.\n", __func__);
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+ dev_dbg(&alg_data->adapter.dev,
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+ "%s(): Waking up xfer routine after zero-xfer.\n",
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+ __func__);
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complete(&alg_data->mif.complete);
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complete(&alg_data->mif.complete);
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}
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}
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- dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
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+ dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
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__func__, ioread32(I2C_REG_STS(alg_data)));
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__func__, ioread32(I2C_REG_STS(alg_data)));
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return 0;
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return 0;
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@@ -235,21 +234,21 @@ static int i2c_pnx_master_xmit(struct i2c_adapter *adap)
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*
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*
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* Reads one byte data from the slave
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* Reads one byte data from the slave
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*/
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*/
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-static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
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+static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data)
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{
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{
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- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
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unsigned int val = 0;
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unsigned int val = 0;
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u32 ctl = 0;
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u32 ctl = 0;
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- dev_dbg(&adap->dev, "%s(): entering: stat = %04x.\n",
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+ dev_dbg(&alg_data->adapter.dev, "%s(): entering: stat = %04x.\n",
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__func__, ioread32(I2C_REG_STS(alg_data)));
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__func__, ioread32(I2C_REG_STS(alg_data)));
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/* Check, whether there is already data,
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/* Check, whether there is already data,
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* or we didn't 'ask' for it yet.
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* or we didn't 'ask' for it yet.
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*/
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*/
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if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
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if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {
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- dev_dbg(&adap->dev, "%s(): Write dummy data to fill "
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- "Rx-fifo...\n", __func__);
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+ dev_dbg(&alg_data->adapter.dev,
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+ "%s(): Write dummy data to fill Rx-fifo...\n",
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+ __func__);
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if (alg_data->mif.len == 1) {
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if (alg_data->mif.len == 1) {
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/* Last byte, do not acknowledge next rcv. */
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/* Last byte, do not acknowledge next rcv. */
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@@ -281,16 +280,16 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
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if (alg_data->mif.len > 0) {
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if (alg_data->mif.len > 0) {
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val = ioread32(I2C_REG_RX(alg_data));
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val = ioread32(I2C_REG_RX(alg_data));
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*alg_data->mif.buf++ = (u8) (val & 0xff);
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*alg_data->mif.buf++ = (u8) (val & 0xff);
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- dev_dbg(&adap->dev, "%s(): rcv 0x%x [%d]\n", __func__, val,
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- alg_data->mif.len);
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+ dev_dbg(&alg_data->adapter.dev, "%s(): rcv 0x%x [%d]\n",
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+ __func__, val, alg_data->mif.len);
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alg_data->mif.len--;
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alg_data->mif.len--;
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if (alg_data->mif.len == 0) {
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if (alg_data->mif.len == 0) {
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if (alg_data->last)
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if (alg_data->last)
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/* Wait until the STOP is seen. */
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/* Wait until the STOP is seen. */
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
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if (wait_timeout(I2C_PNX_TIMEOUT, alg_data))
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- dev_err(&adap->dev, "The bus is still "
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- "active after timeout\n");
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+ dev_err(&alg_data->adapter.dev,
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+ "The bus is still active after timeout\n");
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/* Disable master interrupts */
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/* Disable master interrupts */
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ctl = ioread32(I2C_REG_CTL(alg_data));
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ctl = ioread32(I2C_REG_CTL(alg_data));
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@@ -304,7 +303,7 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
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}
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}
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}
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}
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|
- dev_dbg(&adap->dev, "%s(): exiting: stat = %04x.\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev, "%s(): exiting: stat = %04x.\n",
|
|
__func__, ioread32(I2C_REG_STS(alg_data)));
|
|
__func__, ioread32(I2C_REG_STS(alg_data)));
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
@@ -312,11 +311,11 @@ static int i2c_pnx_master_rcv(struct i2c_adapter *adap)
|
|
|
|
|
|
static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
{
|
|
{
|
|
|
|
+ struct i2c_pnx_algo_data *alg_data = dev_id;
|
|
u32 stat, ctl;
|
|
u32 stat, ctl;
|
|
- struct i2c_adapter *adap = dev_id;
|
|
|
|
- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
|
|
|
|
|
|
- dev_dbg(&adap->dev, "%s(): mstat = %x mctrl = %x, mode = %d\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
|
|
+ "%s(): mstat = %x mctrl = %x, mode = %d\n",
|
|
__func__,
|
|
__func__,
|
|
ioread32(I2C_REG_STS(alg_data)),
|
|
ioread32(I2C_REG_STS(alg_data)),
|
|
ioread32(I2C_REG_CTL(alg_data)),
|
|
ioread32(I2C_REG_CTL(alg_data)),
|
|
@@ -339,10 +338,10 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
complete(&alg_data->mif.complete);
|
|
complete(&alg_data->mif.complete);
|
|
} else if (stat & mstatus_nai) {
|
|
} else if (stat & mstatus_nai) {
|
|
/* Slave did not acknowledge, generate a STOP */
|
|
/* Slave did not acknowledge, generate a STOP */
|
|
- dev_dbg(&adap->dev, "%s(): "
|
|
|
|
- "Slave did not acknowledge, generating a STOP.\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
|
|
+ "%s(): Slave did not acknowledge, generating a STOP.\n",
|
|
__func__);
|
|
__func__);
|
|
- i2c_pnx_stop(adap);
|
|
|
|
|
|
+ i2c_pnx_stop(alg_data);
|
|
|
|
|
|
/* Disable master interrupts. */
|
|
/* Disable master interrupts. */
|
|
ctl = ioread32(I2C_REG_CTL(alg_data));
|
|
ctl = ioread32(I2C_REG_CTL(alg_data));
|
|
@@ -368,9 +367,9 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
*/
|
|
*/
|
|
if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
|
|
if ((stat & mstatus_drmi) || !(stat & mstatus_rfe)) {
|
|
if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
|
|
if (alg_data->mif.mode == I2C_SMBUS_WRITE) {
|
|
- i2c_pnx_master_xmit(adap);
|
|
|
|
|
|
+ i2c_pnx_master_xmit(alg_data);
|
|
} else if (alg_data->mif.mode == I2C_SMBUS_READ) {
|
|
} else if (alg_data->mif.mode == I2C_SMBUS_READ) {
|
|
- i2c_pnx_master_rcv(adap);
|
|
|
|
|
|
+ i2c_pnx_master_rcv(alg_data);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
@@ -379,7 +378,8 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
stat = ioread32(I2C_REG_STS(alg_data));
|
|
stat = ioread32(I2C_REG_STS(alg_data));
|
|
iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
|
|
iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));
|
|
|
|
|
|
- dev_dbg(&adap->dev, "%s(): exiting, stat = %x ctrl = %x.\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
|
|
+ "%s(): exiting, stat = %x ctrl = %x.\n",
|
|
__func__, ioread32(I2C_REG_STS(alg_data)),
|
|
__func__, ioread32(I2C_REG_STS(alg_data)),
|
|
ioread32(I2C_REG_CTL(alg_data)));
|
|
ioread32(I2C_REG_CTL(alg_data)));
|
|
|
|
|
|
@@ -388,14 +388,13 @@ static irqreturn_t i2c_pnx_interrupt(int irq, void *dev_id)
|
|
|
|
|
|
static void i2c_pnx_timeout(unsigned long data)
|
|
static void i2c_pnx_timeout(unsigned long data)
|
|
{
|
|
{
|
|
- struct i2c_adapter *adap = (struct i2c_adapter *)data;
|
|
|
|
- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
|
|
|
|
+ struct i2c_pnx_algo_data *alg_data = (struct i2c_pnx_algo_data *)data;
|
|
u32 ctl;
|
|
u32 ctl;
|
|
|
|
|
|
- dev_err(&adap->dev, "Master timed out. stat = %04x, cntrl = %04x. "
|
|
|
|
- "Resetting master...\n",
|
|
|
|
- ioread32(I2C_REG_STS(alg_data)),
|
|
|
|
- ioread32(I2C_REG_CTL(alg_data)));
|
|
|
|
|
|
+ dev_err(&alg_data->adapter.dev,
|
|
|
|
+ "Master timed out. stat = %04x, cntrl = %04x. Resetting master...\n",
|
|
|
|
+ ioread32(I2C_REG_STS(alg_data)),
|
|
|
|
+ ioread32(I2C_REG_CTL(alg_data)));
|
|
|
|
|
|
/* Reset master and disable interrupts */
|
|
/* Reset master and disable interrupts */
|
|
ctl = ioread32(I2C_REG_CTL(alg_data));
|
|
ctl = ioread32(I2C_REG_CTL(alg_data));
|
|
@@ -409,15 +408,14 @@ static void i2c_pnx_timeout(unsigned long data)
|
|
complete(&alg_data->mif.complete);
|
|
complete(&alg_data->mif.complete);
|
|
}
|
|
}
|
|
|
|
|
|
-static inline void bus_reset_if_active(struct i2c_adapter *adap)
|
|
|
|
|
|
+static inline void bus_reset_if_active(struct i2c_pnx_algo_data *alg_data)
|
|
{
|
|
{
|
|
- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
|
|
u32 stat;
|
|
u32 stat;
|
|
|
|
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {
|
|
- dev_err(&adap->dev,
|
|
|
|
|
|
+ dev_err(&alg_data->adapter.dev,
|
|
"%s: Bus is still active after xfer. Reset it...\n",
|
|
"%s: Bus is still active after xfer. Reset it...\n",
|
|
- adap->name);
|
|
|
|
|
|
+ alg_data->adapter.name);
|
|
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
|
|
iowrite32(ioread32(I2C_REG_CTL(alg_data)) | mcntrl_reset,
|
|
I2C_REG_CTL(alg_data));
|
|
I2C_REG_CTL(alg_data));
|
|
wait_reset(I2C_PNX_TIMEOUT, alg_data);
|
|
wait_reset(I2C_PNX_TIMEOUT, alg_data);
|
|
@@ -451,10 +449,11 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
|
struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
u32 stat = ioread32(I2C_REG_STS(alg_data));
|
|
u32 stat = ioread32(I2C_REG_STS(alg_data));
|
|
|
|
|
|
- dev_dbg(&adap->dev, "%s(): entering: %d messages, stat = %04x.\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
|
|
+ "%s(): entering: %d messages, stat = %04x.\n",
|
|
__func__, num, ioread32(I2C_REG_STS(alg_data)));
|
|
__func__, num, ioread32(I2C_REG_STS(alg_data)));
|
|
|
|
|
|
- bus_reset_if_active(adap);
|
|
|
|
|
|
+ bus_reset_if_active(alg_data);
|
|
|
|
|
|
/* Process transactions in a loop. */
|
|
/* Process transactions in a loop. */
|
|
for (i = 0; rc >= 0 && i < num; i++) {
|
|
for (i = 0; rc >= 0 && i < num; i++) {
|
|
@@ -464,9 +463,9 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
|
addr = pmsg->addr;
|
|
addr = pmsg->addr;
|
|
|
|
|
|
if (pmsg->flags & I2C_M_TEN) {
|
|
if (pmsg->flags & I2C_M_TEN) {
|
|
- dev_err(&adap->dev,
|
|
|
|
|
|
+ dev_err(&alg_data->adapter.dev,
|
|
"%s: 10 bits addr not supported!\n",
|
|
"%s: 10 bits addr not supported!\n",
|
|
- adap->name);
|
|
|
|
|
|
+ alg_data->adapter.name);
|
|
rc = -EINVAL;
|
|
rc = -EINVAL;
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
@@ -478,11 +477,10 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
|
alg_data->mif.ret = 0;
|
|
alg_data->mif.ret = 0;
|
|
alg_data->last = (i == num - 1);
|
|
alg_data->last = (i == num - 1);
|
|
|
|
|
|
- dev_dbg(&adap->dev, "%s(): mode %d, %d bytes\n", __func__,
|
|
|
|
- alg_data->mif.mode,
|
|
|
|
- alg_data->mif.len);
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev, "%s(): mode %d, %d bytes\n",
|
|
|
|
+ __func__, alg_data->mif.mode, alg_data->mif.len);
|
|
|
|
|
|
- i2c_pnx_arm_timer(adap);
|
|
|
|
|
|
+ i2c_pnx_arm_timer(alg_data);
|
|
|
|
|
|
/* initialize the completion var */
|
|
/* initialize the completion var */
|
|
init_completion(&alg_data->mif.complete);
|
|
init_completion(&alg_data->mif.complete);
|
|
@@ -493,7 +491,7 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
|
I2C_REG_CTL(alg_data));
|
|
I2C_REG_CTL(alg_data));
|
|
|
|
|
|
/* Put start-code and slave-address on the bus. */
|
|
/* Put start-code and slave-address on the bus. */
|
|
- rc = i2c_pnx_start(addr, adap);
|
|
|
|
|
|
+ rc = i2c_pnx_start(addr, alg_data);
|
|
if (rc < 0)
|
|
if (rc < 0)
|
|
break;
|
|
break;
|
|
|
|
|
|
@@ -502,31 +500,32 @@ i2c_pnx_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
|
|
|
|
|
|
if (!(rc = alg_data->mif.ret))
|
|
if (!(rc = alg_data->mif.ret))
|
|
completed++;
|
|
completed++;
|
|
- dev_dbg(&adap->dev, "%s(): Complete, return code = %d.\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
|
|
+ "%s(): Complete, return code = %d.\n",
|
|
__func__, rc);
|
|
__func__, rc);
|
|
|
|
|
|
/* Clear TDI and AFI bits in case they are set. */
|
|
/* Clear TDI and AFI bits in case they are set. */
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {
|
|
- dev_dbg(&adap->dev,
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
"%s: TDI still set... clearing now.\n",
|
|
"%s: TDI still set... clearing now.\n",
|
|
- adap->name);
|
|
|
|
|
|
+ alg_data->adapter.name);
|
|
iowrite32(stat, I2C_REG_STS(alg_data));
|
|
iowrite32(stat, I2C_REG_STS(alg_data));
|
|
}
|
|
}
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
|
|
if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {
|
|
- dev_dbg(&adap->dev,
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev,
|
|
"%s: AFI still set... clearing now.\n",
|
|
"%s: AFI still set... clearing now.\n",
|
|
- adap->name);
|
|
|
|
|
|
+ alg_data->adapter.name);
|
|
iowrite32(stat, I2C_REG_STS(alg_data));
|
|
iowrite32(stat, I2C_REG_STS(alg_data));
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
- bus_reset_if_active(adap);
|
|
|
|
|
|
+ bus_reset_if_active(alg_data);
|
|
|
|
|
|
/* Cleanup to be sure... */
|
|
/* Cleanup to be sure... */
|
|
alg_data->mif.buf = NULL;
|
|
alg_data->mif.buf = NULL;
|
|
alg_data->mif.len = 0;
|
|
alg_data->mif.len = 0;
|
|
|
|
|
|
- dev_dbg(&adap->dev, "%s(): exiting, stat = %x\n",
|
|
|
|
|
|
+ dev_dbg(&alg_data->adapter.dev, "%s(): exiting, stat = %x\n",
|
|
__func__, ioread32(I2C_REG_STS(alg_data)));
|
|
__func__, ioread32(I2C_REG_STS(alg_data)));
|
|
|
|
|
|
if (completed != num)
|
|
if (completed != num)
|
|
@@ -545,69 +544,92 @@ static struct i2c_algorithm pnx_algorithm = {
|
|
.functionality = i2c_pnx_func,
|
|
.functionality = i2c_pnx_func,
|
|
};
|
|
};
|
|
|
|
|
|
|
|
+#ifdef CONFIG_PM
|
|
static int i2c_pnx_controller_suspend(struct platform_device *pdev,
|
|
static int i2c_pnx_controller_suspend(struct platform_device *pdev,
|
|
pm_message_t state)
|
|
pm_message_t state)
|
|
{
|
|
{
|
|
- struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
|
|
|
|
- return i2c_pnx->suspend(pdev, state);
|
|
|
|
|
|
+ struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
|
|
|
|
+
|
|
|
|
+ /* FIXME: shouldn't this be clk_disable? */
|
|
|
|
+ clk_enable(alg_data->clk);
|
|
|
|
+
|
|
|
|
+ return 0;
|
|
}
|
|
}
|
|
|
|
|
|
static int i2c_pnx_controller_resume(struct platform_device *pdev)
|
|
static int i2c_pnx_controller_resume(struct platform_device *pdev)
|
|
{
|
|
{
|
|
- struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
|
|
|
|
- return i2c_pnx->resume(pdev);
|
|
|
|
|
|
+ struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
|
|
|
|
+
|
|
|
|
+ return clk_enable(alg_data->clk);
|
|
}
|
|
}
|
|
|
|
+#else
|
|
|
|
+#define i2c_pnx_controller_suspend NULL
|
|
|
|
+#define i2c_pnx_controller_resume NULL
|
|
|
|
+#endif
|
|
|
|
|
|
static int __devinit i2c_pnx_probe(struct platform_device *pdev)
|
|
static int __devinit i2c_pnx_probe(struct platform_device *pdev)
|
|
{
|
|
{
|
|
unsigned long tmp;
|
|
unsigned long tmp;
|
|
int ret = 0;
|
|
int ret = 0;
|
|
struct i2c_pnx_algo_data *alg_data;
|
|
struct i2c_pnx_algo_data *alg_data;
|
|
- int freq_mhz;
|
|
|
|
|
|
+ unsigned long freq;
|
|
struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
|
|
struct i2c_pnx_data *i2c_pnx = pdev->dev.platform_data;
|
|
|
|
|
|
- if (!i2c_pnx || !i2c_pnx->adapter) {
|
|
|
|
|
|
+ if (!i2c_pnx || !i2c_pnx->name) {
|
|
dev_err(&pdev->dev, "%s: no platform data supplied\n",
|
|
dev_err(&pdev->dev, "%s: no platform data supplied\n",
|
|
__func__);
|
|
__func__);
|
|
ret = -EINVAL;
|
|
ret = -EINVAL;
|
|
goto out;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
|
|
- platform_set_drvdata(pdev, i2c_pnx);
|
|
|
|
-
|
|
|
|
- if (i2c_pnx->calculate_input_freq)
|
|
|
|
- freq_mhz = i2c_pnx->calculate_input_freq(pdev);
|
|
|
|
- else {
|
|
|
|
- freq_mhz = PNX_DEFAULT_FREQ;
|
|
|
|
- dev_info(&pdev->dev, "Setting bus frequency to default value: "
|
|
|
|
- "%d MHz\n", freq_mhz);
|
|
|
|
|
|
+ alg_data = kzalloc(sizeof(*alg_data), GFP_KERNEL);
|
|
|
|
+ if (!alg_data) {
|
|
|
|
+ ret = -ENOMEM;
|
|
|
|
+ goto err_kzalloc;
|
|
}
|
|
}
|
|
|
|
|
|
- i2c_pnx->adapter->algo = &pnx_algorithm;
|
|
|
|
|
|
+ platform_set_drvdata(pdev, alg_data);
|
|
|
|
+
|
|
|
|
+ strlcpy(alg_data->adapter.name, i2c_pnx->name,
|
|
|
|
+ sizeof(alg_data->adapter.name));
|
|
|
|
+ alg_data->adapter.dev.parent = &pdev->dev;
|
|
|
|
+ alg_data->adapter.algo = &pnx_algorithm;
|
|
|
|
+ alg_data->adapter.algo_data = alg_data;
|
|
|
|
+ alg_data->adapter.nr = pdev->id;
|
|
|
|
+ alg_data->i2c_pnx = i2c_pnx;
|
|
|
|
+
|
|
|
|
+ alg_data->clk = clk_get(&pdev->dev, NULL);
|
|
|
|
+ if (IS_ERR(alg_data->clk)) {
|
|
|
|
+ ret = PTR_ERR(alg_data->clk);
|
|
|
|
+ goto out_drvdata;
|
|
|
|
+ }
|
|
|
|
|
|
- alg_data = i2c_pnx->adapter->algo_data;
|
|
|
|
init_timer(&alg_data->mif.timer);
|
|
init_timer(&alg_data->mif.timer);
|
|
alg_data->mif.timer.function = i2c_pnx_timeout;
|
|
alg_data->mif.timer.function = i2c_pnx_timeout;
|
|
- alg_data->mif.timer.data = (unsigned long)i2c_pnx->adapter;
|
|
|
|
|
|
+ alg_data->mif.timer.data = (unsigned long)alg_data;
|
|
|
|
|
|
/* Register I/O resource */
|
|
/* Register I/O resource */
|
|
- if (!request_mem_region(alg_data->base, I2C_PNX_REGION_SIZE,
|
|
|
|
|
|
+ if (!request_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE,
|
|
pdev->name)) {
|
|
pdev->name)) {
|
|
dev_err(&pdev->dev,
|
|
dev_err(&pdev->dev,
|
|
"I/O region 0x%08x for I2C already in use.\n",
|
|
"I/O region 0x%08x for I2C already in use.\n",
|
|
- alg_data->base);
|
|
|
|
|
|
+ i2c_pnx->base);
|
|
ret = -ENODEV;
|
|
ret = -ENODEV;
|
|
- goto out_drvdata;
|
|
|
|
|
|
+ goto out_clkget;
|
|
}
|
|
}
|
|
|
|
|
|
- if (!(alg_data->ioaddr =
|
|
|
|
- (u32)ioremap(alg_data->base, I2C_PNX_REGION_SIZE))) {
|
|
|
|
|
|
+ alg_data->ioaddr = ioremap(i2c_pnx->base, I2C_PNX_REGION_SIZE);
|
|
|
|
+ if (!alg_data->ioaddr) {
|
|
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
|
|
dev_err(&pdev->dev, "Couldn't ioremap I2C I/O region\n");
|
|
ret = -ENOMEM;
|
|
ret = -ENOMEM;
|
|
goto out_release;
|
|
goto out_release;
|
|
}
|
|
}
|
|
|
|
|
|
- i2c_pnx->set_clock_run(pdev);
|
|
|
|
|
|
+ ret = clk_enable(alg_data->clk);
|
|
|
|
+ if (ret)
|
|
|
|
+ goto out_unmap;
|
|
|
|
+
|
|
|
|
+ freq = clk_get_rate(alg_data->clk);
|
|
|
|
|
|
/*
|
|
/*
|
|
* Clock Divisor High This value is the number of system clocks
|
|
* Clock Divisor High This value is the number of system clocks
|
|
@@ -620,45 +642,47 @@ static int __devinit i2c_pnx_probe(struct platform_device *pdev)
|
|
* the deglitching filter length.
|
|
* the deglitching filter length.
|
|
*/
|
|
*/
|
|
|
|
|
|
- tmp = ((freq_mhz * 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
|
|
|
|
|
|
+ tmp = ((freq / 1000) / I2C_PNX_SPEED_KHZ) / 2 - 2;
|
|
iowrite32(tmp, I2C_REG_CKH(alg_data));
|
|
iowrite32(tmp, I2C_REG_CKH(alg_data));
|
|
iowrite32(tmp, I2C_REG_CKL(alg_data));
|
|
iowrite32(tmp, I2C_REG_CKL(alg_data));
|
|
|
|
|
|
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
|
|
iowrite32(mcntrl_reset, I2C_REG_CTL(alg_data));
|
|
if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
|
|
if (wait_reset(I2C_PNX_TIMEOUT, alg_data)) {
|
|
ret = -ENODEV;
|
|
ret = -ENODEV;
|
|
- goto out_unmap;
|
|
|
|
|
|
+ goto out_clock;
|
|
}
|
|
}
|
|
init_completion(&alg_data->mif.complete);
|
|
init_completion(&alg_data->mif.complete);
|
|
|
|
|
|
- ret = request_irq(alg_data->irq, i2c_pnx_interrupt,
|
|
|
|
- 0, pdev->name, i2c_pnx->adapter);
|
|
|
|
|
|
+ ret = request_irq(i2c_pnx->irq, i2c_pnx_interrupt,
|
|
|
|
+ 0, pdev->name, alg_data);
|
|
if (ret)
|
|
if (ret)
|
|
goto out_clock;
|
|
goto out_clock;
|
|
|
|
|
|
/* Register this adapter with the I2C subsystem */
|
|
/* Register this adapter with the I2C subsystem */
|
|
- i2c_pnx->adapter->dev.parent = &pdev->dev;
|
|
|
|
- i2c_pnx->adapter->nr = pdev->id;
|
|
|
|
- ret = i2c_add_numbered_adapter(i2c_pnx->adapter);
|
|
|
|
|
|
+ ret = i2c_add_numbered_adapter(&alg_data->adapter);
|
|
if (ret < 0) {
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
|
|
dev_err(&pdev->dev, "I2C: Failed to add bus\n");
|
|
goto out_irq;
|
|
goto out_irq;
|
|
}
|
|
}
|
|
|
|
|
|
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
|
|
dev_dbg(&pdev->dev, "%s: Master at %#8x, irq %d.\n",
|
|
- i2c_pnx->adapter->name, alg_data->base, alg_data->irq);
|
|
|
|
|
|
+ alg_data->adapter.name, i2c_pnx->base, i2c_pnx->irq);
|
|
|
|
|
|
return 0;
|
|
return 0;
|
|
|
|
|
|
out_irq:
|
|
out_irq:
|
|
- free_irq(alg_data->irq, i2c_pnx->adapter);
|
|
|
|
|
|
+ free_irq(i2c_pnx->irq, alg_data);
|
|
out_clock:
|
|
out_clock:
|
|
- i2c_pnx->set_clock_stop(pdev);
|
|
|
|
|
|
+ clk_disable(alg_data->clk);
|
|
out_unmap:
|
|
out_unmap:
|
|
- iounmap((void *)alg_data->ioaddr);
|
|
|
|
|
|
+ iounmap(alg_data->ioaddr);
|
|
out_release:
|
|
out_release:
|
|
- release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
|
|
|
|
|
|
+ release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
|
|
|
|
+out_clkget:
|
|
|
|
+ clk_put(alg_data->clk);
|
|
out_drvdata:
|
|
out_drvdata:
|
|
|
|
+ kfree(alg_data);
|
|
|
|
+err_kzalloc:
|
|
platform_set_drvdata(pdev, NULL);
|
|
platform_set_drvdata(pdev, NULL);
|
|
out:
|
|
out:
|
|
return ret;
|
|
return ret;
|
|
@@ -666,15 +690,16 @@ out:
|
|
|
|
|
|
static int __devexit i2c_pnx_remove(struct platform_device *pdev)
|
|
static int __devexit i2c_pnx_remove(struct platform_device *pdev)
|
|
{
|
|
{
|
|
- struct i2c_pnx_data *i2c_pnx = platform_get_drvdata(pdev);
|
|
|
|
- struct i2c_adapter *adap = i2c_pnx->adapter;
|
|
|
|
- struct i2c_pnx_algo_data *alg_data = adap->algo_data;
|
|
|
|
-
|
|
|
|
- free_irq(alg_data->irq, i2c_pnx->adapter);
|
|
|
|
- i2c_del_adapter(adap);
|
|
|
|
- i2c_pnx->set_clock_stop(pdev);
|
|
|
|
- iounmap((void *)alg_data->ioaddr);
|
|
|
|
- release_mem_region(alg_data->base, I2C_PNX_REGION_SIZE);
|
|
|
|
|
|
+ struct i2c_pnx_algo_data *alg_data = platform_get_drvdata(pdev);
|
|
|
|
+ struct i2c_pnx_data *i2c_pnx = alg_data->i2c_pnx;
|
|
|
|
+
|
|
|
|
+ free_irq(i2c_pnx->irq, alg_data);
|
|
|
|
+ i2c_del_adapter(&alg_data->adapter);
|
|
|
|
+ clk_disable(alg_data->clk);
|
|
|
|
+ iounmap(alg_data->ioaddr);
|
|
|
|
+ release_mem_region(i2c_pnx->base, I2C_PNX_REGION_SIZE);
|
|
|
|
+ clk_put(alg_data->clk);
|
|
|
|
+ kfree(alg_data);
|
|
platform_set_drvdata(pdev, NULL);
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
|
|
return 0;
|
|
return 0;
|