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@@ -183,4 +183,45 @@
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reg = < 0x70000868 0xd0 /* Pad control registers */
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0x70003000 0x3e0 >; /* Mux registers */
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};
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+
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+ ahub {
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+ compatible = "nvidia,tegra30-ahub";
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+ reg = <0x70080000 0x200 0x70080200 0x100>;
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+ interrupts = < 0 103 0x04 >;
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+ nvidia,dma-request-selector = <&apbdma 1>;
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+
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+ ranges;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ tegra_i2s0: i2s@70080300 {
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+ compatible = "nvidia,tegra30-i2s";
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+ reg = <0x70080300 0x100>;
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+ nvidia,ahub-cif-ids = <4 4>;
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+ };
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+
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+ tegra_i2s1: i2s@70080400 {
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+ compatible = "nvidia,tegra30-i2s";
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+ reg = <0x70080400 0x100>;
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+ nvidia,ahub-cif-ids = <5 5>;
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+ };
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+
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+ tegra_i2s2: i2s@70080500 {
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+ compatible = "nvidia,tegra30-i2s";
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+ reg = <0x70080500 0x100>;
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+ nvidia,ahub-cif-ids = <6 6>;
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+ };
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+
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+ tegra_i2s3: i2s@70080600 {
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+ compatible = "nvidia,tegra30-i2s";
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+ reg = <0x70080600 0x100>;
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+ nvidia,ahub-cif-ids = <7 7>;
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+ };
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+
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+ tegra_i2s4: i2s@70080700 {
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+ compatible = "nvidia,tegra30-i2s";
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+ reg = <0x70080700 0x100>;
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+ nvidia,ahub-cif-ids = <8 8>;
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+ };
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+ };
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};
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